feat: 更新依赖项，添加 Ioremap 结构及其 MMIO 操作实现，优化 VDeviceList 设备调用逻辑

Author: ZR233

Cargo.toml

@@ -21,38 +21,43 @@ timer_list = "0.1"
 axerrno = "0.1.0"
 bitmap-allocator = "0.2.1"
 cpumask = "0.1.0"
+derive_more = {version = "2", default-features = false, features = ["full"]}
 kspin = "0.1"
 memory_addr = "0.4"
 page_table_entry = {version = "0.5", features = ["arm-el2"]}
 page_table_multiarch = "0.5"
 vm-allocator.workspace = true
-derive_more = { version = "2", default-features = false, features = ["full"] }
+rdif-intc = "0.12"
 
 # System dependent modules provided by ArceOS-Hypervisor.
 axaddrspace = "0.2"
 
 axhal.workspace = true
+axklib.workspace = true
 axruntime.workspace = true
 axstd.workspace = true
 axvm-types.workspace = true
 axvmconfig = {version = "0.1", default-features = false}
 fdt-edit = "0.1"
+mmio-api = "0.1"
+rdrive.workspace = true
 
-axvdev = { version = "0.1" }
+axvdev = {version = "0.1"}
 
-ringbuf = { version = "0.4", default-features = false }
+ringbuf = {version = "0.4", default-features = false}
 
 [target.'cfg(target_arch = "x86_64")'.dependencies]
+axplat-x86-qemu-q35.workspace = true
 raw-cpuid = "11"
 x86_vcpu = "0.1"
-axplat-x86-qemu-q35.workspace = true
 
 [target.'cfg(target_arch = "riscv64")'.dependencies]
 # riscv_vcpu = "0.1"
 
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 aarch64-cpu = "11.0"
 aarch64-cpu-ext = "0.1"
+arm-gic-driver = {version = "0.15", features = ["rdif"]}
 arm_vcpu = "0.3"
 arm_vgic = {version = "0.3"}
 

src/arch/aarch64/plat.rs

@@ -1,6 +1,9 @@
-use arm_vgic::v3;
+use arm_gic_driver::IntId;
+use arm_vgic::{IrqChipOp, v3};
+use axvdev::IrqNum;
+use rdif_intc::Intc;
 
-use crate::{fdt::fdt_edit, vdev::VDeviceList};
+use crate::{fdt::fdt_edit, hal::Ioremap, vdev::VDeviceList};
 
 pub struct PlatData {
     vdev: VDeviceList,
@@ -34,22 +37,52 @@ impl PlatData {
         let gicd = regs.get(0).ok_or(anyhow!("No GICD reg"))?;
         let gicr = regs.get(1).ok_or(anyhow!("No GICR reg"))?;
         let plat = self.vdev.new_plat();
-        let mut gic = v3::VGic::new();
 
-        // self.vdev.add_device(|plat| {
-        //     let gic = v3::VGic::new(
-        //         (gicd.address as usize).into(),
-        //         (gicr.address as usize).into(),
-        //         plat.clone(),
-        //     );
-        //     Ok(gic)
-        // });
+        let config = arm_vgic::VGicConfig::new(crate::hal::cpu::count(), &Ioremap, IrqOp {});
+
+        let mut gic = v3::VGic::new(config);
 
         self.vdev.add_device(|plat| {
-            let gicd = gic.new_gicd(plat.clone(), (gicd.address as usize).into());
+            let gicd = gic.build_gicd(plat.clone(), (gicd.address as usize).into());
             Ok(gicd)
         })?;
 
         Ok(())
     }
 }
+
+fn with_gicv3<F, R>(f: F) -> R
+where
+    F: FnOnce(&mut arm_gic_driver::v3::Gic) -> R,
+{
+    let mut g = rdrive::get_one::<Intc>().unwrap().lock().unwrap();
+    let gic = g
+        .typed_mut::<arm_gic_driver::v3::Gic>()
+        .expect("GIC is not GICv3");
+    f(gic)
+}
+
+fn covnert_irq(irq: IrqNum) -> IntId {
+    let id: usize = irq.into();
+    unsafe { IntId::raw(id as _) }
+}
+
+struct IrqOp {}
+
+impl IrqChipOp for IrqOp {
+    fn get_cfg(&self, irq: IrqNum) -> arm_vgic::Trigger {
+        let res = with_gicv3(|gic| gic.get_cfg(covnert_irq(irq)));
+        match res {
+            arm_gic_driver::v3::Trigger::Level => arm_vgic::Trigger::Level,
+            arm_gic_driver::v3::Trigger::Edge => arm_vgic::Trigger::Edge,
+        }
+    }
+
+    fn set_cfg(&self, irq: IrqNum, cfg: arm_vgic::Trigger) {
+        let t = match cfg {
+            arm_vgic::Trigger::Level => arm_gic_driver::v3::Trigger::Level,
+            arm_vgic::Trigger::Edge => arm_gic_driver::v3::Trigger::Edge,
+        };
+        with_gicv3(|gic| gic.set_cfg(covnert_irq(irq), t));
+    }
+}

src/hal/mod.rs

@@ -1,7 +1,11 @@
 use alloc::vec::Vec;
 use axvdev::VDeviceManager;
 use bitmap_allocator::BitAlloc;
-use core::sync::atomic::{AtomicUsize, Ordering};
+use core::{
+    ptr::NonNull,
+    sync::atomic::{AtomicUsize, Ordering},
+};
+use mmio_api::{Mmio, MmioOp};
 use std::{
     os::arceos::{api::task::AxCpuMask, modules::axtask::set_current_affinity},
     thread::yield_now,
@@ -94,3 +98,21 @@ pub fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr {
         .as_usize()
         .into()
 }
+
+pub struct Ioremap;
+
+impl MmioOp for Ioremap {
+    fn ioremap(
+        &self,
+        addr: mmio_api::MmioAddr,
+        size: usize,
+    ) -> Result<mmio_api::Mmio, anyhow::Error> {
+        let paddr = addr.as_usize();
+        let vaddr = axklib::mem::iomap(paddr.into(), size).unwrap();
+        Ok(unsafe { Mmio::new(addr, NonNull::new_unchecked(vaddr.as_mut_ptr()), size) })
+    }
+
+    fn iounmap(&self, mmio: &mmio_api::Mmio) {
+        todo!()
+    }
+}

src/vm/vdev.rs

@@ -147,7 +147,7 @@ impl VDeviceList {
     }
 
     fn device_try_invoke(&self, id: u32) {
-        self.get_device(*id).unwrap().try_invoke();
+        self.get_device(id).unwrap().try_invoke();
     }
 }