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refactor: 清理未使用的导入和结构,优化代码可读性
1 parent c158651 commit f3c369d

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10 files changed

+12
-56
lines changed

10 files changed

+12
-56
lines changed

src/arch/aarch64/cpu.rs

Lines changed: 2 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
1-
use core::{fmt::Display, ops::Deref, sync::atomic::AtomicBool};
2-
use std::sync::Arc;
1+
use core::{fmt::Display, ops::Deref};
32

43
use aarch64_cpu::registers::*;
54
use arm_vcpu::{Aarch64PerCpu, Aarch64VCpuCreateConfig};
@@ -11,7 +10,7 @@ use crate::{
1110
vcpu::{VCpuCommon, VCpuOp},
1211
vhal::{
1312
ArchCpuData,
14-
cpu::{CpuHardId, CpuId, HCpuExclusive},
13+
cpu::{CpuHardId, CpuId},
1514
},
1615
};
1716

@@ -82,28 +81,6 @@ impl arm_vcpu::CpuHal for VCpuHal {
8281
}
8382
}
8483

85-
#[derive(Clone)]
86-
pub struct VCpuHandle {
87-
is_active: Arc<AtomicBool>,
88-
}
89-
90-
impl VCpuHandle {
91-
pub fn new() -> Self {
92-
VCpuHandle {
93-
is_active: Arc::new(AtomicBool::new(true)),
94-
}
95-
}
96-
97-
pub fn stop(&self) {
98-
self.is_active
99-
.store(false, core::sync::atomic::Ordering::Release);
100-
}
101-
102-
pub fn is_active(&self) -> bool {
103-
self.is_active.load(core::sync::atomic::Ordering::Acquire)
104-
}
105-
}
106-
10784
pub struct VCpu {
10885
pub vcpu: arm_vcpu::Aarch64VCpu,
10986
common: VCpuCommon,

src/arch/aarch64/mod.rs

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,7 @@
1-
use aarch64_cpu_ext::cache::{CacheOp, dcache_range};
2-
31
pub mod cpu;
42
mod hal;
53
mod vm;
64

75
pub use cpu::HCpu;
86
pub use hal::Hal;
97
pub use vm::*;
10-
11-
type AddrSpace = axaddrspace::AddrSpace<axhal::paging::PagingHandlerImpl>;

src/arch/aarch64/vm/inited.rs

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,8 @@
1-
use core::sync::atomic::{AtomicBool, AtomicUsize, Ordering};
2-
use std::{
3-
os::arceos::{api::task::AxCpuMask, modules::axtask::set_current_affinity},
4-
string::String,
5-
vec::Vec,
6-
};
7-
8-
use arm_vcpu::Aarch64VCpuSetupConfig;
1+
use std::{string::String, vec::Vec};
92

103
use crate::{
11-
GuestPhysAddr, TASK_STACK_SIZE, VmAddrSpace, VmMachineInitedOps, VmMachineRunningCommon,
4+
GuestPhysAddr, VmAddrSpace, VmMachineInitedOps, VmMachineRunningCommon,
125
arch::{VmMachineRunning, cpu::VCpu},
13-
config::AxVMConfig,
146
data::VmDataWeak,
157
vm::VmId,
168
};

src/arch/aarch64/vm/unint.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
use core::{ops::Deref, sync::atomic::Ordering};
1+
use core::ops::Deref;
22

33
use alloc::vec::Vec;
44
use arm_vcpu::Aarch64VCpuSetupConfig;
@@ -99,7 +99,7 @@ impl VmMachineUninit {
9999
self.config.id, self.config.name
100100
);
101101
for memory_cfg in &self.config.memory_regions {
102-
let m = vmspace.new_memory(memory_cfg);
102+
vmspace.new_memory(memory_cfg)?;
103103
}
104104

105105
vmspace.load_kernel_image(&self.config)?;

src/fdt/mod.rs

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -82,9 +82,6 @@ impl FdtBuilder {
8282
self.fdt.remove_node(&path).unwrap();
8383
}
8484

85-
let root_address_cells = self.fdt.root().address_cells().unwrap_or(2);
86-
let root_size_cells = self.fdt.root().size_cells().unwrap_or(2);
87-
8885
for (i, m) in memories.enumerate() {
8986
let mut node = Node::new(&format!("memory@{i}"));
9087
let mut prop = Property::new("device_type", vec![]);

src/vhal/cpu.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ impl HCpuExclusive {
3939
where
4040
F: FnOnce(&HCpu) -> R,
4141
{
42-
for (id, cpu) in PRE_CPU.iter() {
42+
for (_id, cpu) in PRE_CPU.iter() {
4343
if cpu.id == self.0 {
4444
return f(cpu);
4545
}

src/vhal/mod.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@ use axstd::{
55
};
66
use bitmap_allocator::BitAlloc;
77
use core::sync::atomic::{AtomicUsize, Ordering};
8-
use spin::Mutex;
98

109
use crate::{
1110
HostPhysAddr, HostVirtAddr, TASK_STACK_SIZE,

src/vm/data.rs

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,7 @@ use spin::RwLock;
1111

1212
use crate::{
1313
AxVMConfig, RunError, VmId, VmMachineInitedOps, VmMachineRunningOps, VmMachineUninitOps,
14-
arch::{VmMachineInited, VmMachineRunning, VmMachineUninit},
15-
config::AxVCpuConfig,
14+
arch::{VmMachineRunning, VmMachineUninit},
1615
vm::machine::{AtomicState, VMStatus, VmMachineState},
1716
};
1817

@@ -75,7 +74,7 @@ impl VmDataInner {
7574
}
7675

7776
pub(crate) fn run_result(&self) -> anyhow::Result<()> {
78-
let mut guard = self.error.write();
77+
let guard = self.error.read();
7978
let res = guard.clone();
8079
match res {
8180
Some(err) => match err {

src/vm/machine/mod.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ pub trait VmMachineUninitOps {
1919
Self: Sized;
2020
}
2121

22+
#[allow(unused)]
2223
pub trait VmMachineInitedOps {
2324
type Running: VmMachineRunningOps;
2425
fn id(&self) -> VmId;
@@ -49,6 +50,7 @@ pub enum VmMachineState {
4950
Inited(VmMachineInited),
5051
Running(VmMachineRunning),
5152
Switching,
53+
#[allow(unused)]
5254
Stopping(VmStatusStopping),
5355
Stopped,
5456
}

src/vm/mod.rs

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,4 @@
1-
use core::fmt;
2-
3-
use alloc::sync::Arc;
4-
use spin::{Mutex, RwLock};
5-
use std::thread;
6-
7-
use crate::{AxVMConfig, arch::VmMachineInited, data::VmData, vm::data::VmDataWeak};
1+
use crate::{AxVMConfig, data::VmData};
82

93
mod addrspace;
104
pub(crate) mod data;

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