11# Architecture identifier.
2- arch = " x86_64 " # str
3- # Platform Package .
4- package = " axplat-x86-pc " # str
2+ arch = " loongarch64 " # str
3+ # Platform package .
4+ package = " axplat-loongarch64-qemu-virt " # str
55# Platform identifier.
6- platform = " x86-pc " # str
6+ platform = " loongarch64-qemu-virt " # str
77# Stack size of each task.
88task-stack-size = 0x40000 # uint
99# Number of timer ticks per second (Hz). A timer tick may contain several timer
@@ -14,26 +14,73 @@ ticks-per-sec = 100 # uint
1414# Device specifications
1515#
1616[devices ]
17- # IPI interrupt num
18- ipi-irq = 0xf3 # uint
17+ ipi-irq = 12
18+ eiointc-irq = 0x03 # uint
19+ # eiointc@1400 {
20+ # reg = <0x00 0x1400 0x00 0x800>;
21+ # interrupts = <0x03>;
22+ # interrupt-parent = <0x8001>;
23+ # #interrupt-cells = <0x01>;
24+ # interrupt-controller;
25+ # compatible = "loongson,ls2k2000-eiointc";
26+ # phandle = <0x8002>;
27+ # };
28+ eiointc-paddr = 0x1400 # uint
29+ # poweroff {
30+ # value = <0x00000034>;
31+ # offset = <0x00000000>;
32+ # compatible = "syscon-poweroff";
33+ # };
34+ # ged@100e001c {
35+ # reg-io-width = <0x00000001>;
36+ # reg-shift = <0x00000000>;
37+ # reg = <0x00000000 0x100e001c 0x00000000 0x00000003>;
38+ # compatible = "syscon";
39+ # };
40+ ged-paddr = 0x100E001C # uint
1941# MMIO ranges with format (`base_paddr`, `size`).
2042mmio-ranges = [
21- [0xb000_0000 , 0x1000_0000 ],
22- [0xfe00_0000 , 0xc0_0000 ],
23- [0xfec0_0000 , 0x1000 ],
24- [0xfed0_0000 , 0x1000 ],
25- [0xfee0_0000 , 0x1000 ]
43+ [0x1000_0000 , 0x0000_0400 ],
44+ [0x100D_0000 , 0x0000_1000 ],
45+ [0x100E_0000 , 0x0000_1000 ],
46+ [0x1FE0_0000 , 0x0000_1000 ],
47+ [0x2000_0000 , 0x1000_0000 ],
48+ [0x4000_0000 , 0x0002_0000 ]
2649] # [(uint, uint)]
50+ # platic@10000000 {
51+ # loongson,pic-base-vec = <0x00>;
52+ # interrupt-parent = <0x8002>;
53+ # #interrupt-cells = <0x02>;
54+ # interrupt-controller;
55+ # reg = <0x00 0x10000000 0x00 0x400>;
56+ # compatible = "loongson,pch-pic-1.0";
57+ # phandle = <0x8003>;
58+ # };
59+ pch-pic-paddr = 0x10000000 # uint
2760# End PCI bus number.
28- pci-bus-end = 0xff # uint
29- # Base physical address of the PCIe ECAM space (should read from ACPI 'MCFG' table).
30- pci-ecam-base = 0xb000_0000 # uint
31- # PCI device memory ranges (not used on x86).
32- pci-ranges = [] # [(uint, uint)]
33- # Timer interrupt frequency in Hz. (4.0GHz)
34- timer-frequency = 4_000_000_000 # uint
35- # Timer interrupt num.
36- timer-irq = 0xf0 # uint
61+ pci-bus-end = 0x7f # uint
62+ # Base physical address of the PCIe ECAM space.
63+ pci-ecam-base = 0x2000_0000 # uint
64+ # PCI device memory ranges.
65+ pci-ranges = [
66+ [0 , 0 ],
67+ [0x4000_0000 , 0x0002_0000 ]
68+ ] # [(uint, uint)]
69+ # RTC (ls7a) Address
70+ rtc-paddr = 0x100d_0100 # uint
71+ # Timer interrupt frequency in Hz.
72+ timer-frequency = 100_000_000 # uint
73+ # Timer interrupt number.
74+ timer-irq = 11 # uint
75+ uart-irq = 0x2 # uint
76+ # serial@1fe001e0 {
77+ # interrupt-parent = <0x00008003>;
78+ # interrupts = <0x00000002 0x00000004>;
79+ # clock-frequency = <0x05f5e100>;
80+ # reg = <0x00000000 0x1fe001e0 0x00000000 0x00000100>;
81+ # compatible = "ns16550a";
82+ # };
83+ uart-paddr = 0x1FE001E0 # uint
3784# VirtIO MMIO ranges with format (`base_paddr`, `size`).
3885virtio-mmio-ranges = [] # [(uint, uint)]
3986
@@ -44,22 +91,28 @@ virtio-mmio-ranges = [] # [(uint, uint)]
4491# Stack size on bootstrapping. (256K)
4592boot-stack-size = 0x40000 # uint
4693# Number of CPUs.
47- cpu-num = 1 # uint
94+ max-cpu-num = 1 # uint
95+ # Base address of the high physical memory.
96+ high-memory-base = 0x8000_0000 # uint
4897# Kernel address space base.
4998kernel-aspace-base = " 0xffff_8000_0000_0000" # uint
5099# Kernel address space size.
51100kernel-aspace-size = " 0x0000_7fff_ffff_f000" # uint
52101# Base physical address of the kernel image.
53- kernel-base-paddr = 0x20_0000 # uint
102+ kernel-base-paddr = 0x0020_0000 # uint
54103# Base virtual address of the kernel image.
55104kernel-base-vaddr = " 0xffff_8000_0020_0000" # uint
105+ # Base address of the low physical memory.
106+ low-memory-base = 0x0 # uint
107+ # Size of the low physical memory. (256M)
108+ low-memory-size = 0x1000_0000 # uint
109+ # Linear mapping offset at boot time.
110+ phys-boot-offset = " 0x9000_0000_0000_0000" # uint
56111# Offset of bus address and phys address. some boards, the bus address is
57112# different from the physical address.
58113phys-bus-offset = 0 # uint
59- # Base address of the whole physical memory.
60- phys-memory-base = 0 # uint
61114# Size of the whole physical memory. (128M)
62115phys-memory-size = 0x800_0000 # uint
63116# Linear mapping offset, for quick conversions between physical and virtual
64117# addresses.
65- phys-virt-offset = " 0xffff_8000_0000_0000" # uint
118+ phys-virt-offset = " 0xffff_8000_0000_0000" # uint
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