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Only keep _start in the .text section to fix #25 (#26)
* [platforms] only keep `_start` in `.text` section Specifically, it moves `_start_primary` and `_start_secondary` from the `.text.boot` section to the `.text` section to prevent the linker from placing them before `_start`. Fix #25 * [chore] fix cargo build warnings * fix: replace `doc_auto_cfg` with `doc_cfg` See rust-lang/rust#138907 * chore: remove `link_section = ".text"` --------- Co-authored-by: 朝倉水希 <[email protected]>
1 parent 9e93b28 commit 652f766

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12 files changed

+6
-15
lines changed

12 files changed

+6
-15
lines changed

axplat/src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#![cfg_attr(not(test), no_std)]
2-
#![cfg_attr(docsrs, feature(doc_auto_cfg))]
2+
#![cfg_attr(docsrs, feature(doc_cfg))]
33
#![doc = include_str!("../README.md")]
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55
#[macro_use]

platforms/axplat-aarch64-bsta1000b/src/boot.rs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,6 @@ unsafe extern "C" fn _start() -> ! {
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8080
/// The earliest entry point for the primary CPU.
8181
#[unsafe(naked)]
82-
#[unsafe(link_section = ".text.boot")]
8382
unsafe extern "C" fn _start_primary() -> ! {
8483
// X0 = dtb
8584
core::arch::naked_asm!("
@@ -120,7 +119,6 @@ unsafe extern "C" fn _start_primary() -> ! {
120119
/// The earliest entry point for the secondary CPUs.
121120
#[cfg(feature = "smp")]
122121
#[unsafe(naked)]
123-
#[unsafe(link_section = ".text.boot")]
124122
pub(crate) unsafe extern "C" fn _start_secondary() -> ! {
125123
// X0 = stack pointer
126124
core::arch::naked_asm!("

platforms/axplat-aarch64-bsta1000b/src/mp.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ pub fn start_secondary_cpu(cpu_id: usize, stack_top: PhysAddr) {
88
return;
99
}
1010

11-
let entry = virt_to_phys(va!(crate::boot::_start_secondary as usize));
11+
let entry = virt_to_phys(va!(crate::boot::_start_secondary as *const () as usize));
1212
axplat_aarch64_peripherals::psci::cpu_on(
1313
CPU_ID_LIST[cpu_id],
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entry.as_usize(),

platforms/axplat-aarch64-phytium-pi/src/boot.rs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,6 @@ unsafe extern "C" fn _start() -> ! {
8080

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/// The earliest entry point for the primary CPU.
8282
#[unsafe(naked)]
83-
#[unsafe(link_section = ".text.boot")]
8483
unsafe extern "C" fn _start_primary() -> ! {
8584
// X0 = dtb
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core::arch::naked_asm!("
@@ -123,7 +122,6 @@ unsafe extern "C" fn _start_primary() -> ! {
123122
/// The earliest entry point for the secondary CPUs.
124123
#[cfg(feature = "smp")]
125124
#[unsafe(naked)]
126-
#[unsafe(link_section = ".text.boot")]
127125
pub(crate) unsafe extern "C" fn _start_secondary() -> ! {
128126
// X0 = stack pointer
129127
core::arch::naked_asm!("

platforms/axplat-aarch64-phytium-pi/src/power.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ impl PowerIf for PowerImpl {
1414
use crate::config::plat::CPU_ID_LIST;
1515
use axplat::mem::{va, virt_to_phys};
1616

17-
let entry = virt_to_phys(va!(crate::boot::_start_secondary as usize));
17+
let entry = virt_to_phys(va!(crate::boot::_start_secondary as *const () as usize));
1818
axplat_aarch64_peripherals::psci::cpu_on(
1919
CPU_ID_LIST[cpu_id],
2020
entry.as_usize(),

platforms/axplat-aarch64-qemu-virt/src/boot.rs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,6 @@ unsafe extern "C" fn _start() -> ! {
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/// The earliest entry point for the primary CPU.
7575
#[unsafe(naked)]
76-
#[unsafe(link_section = ".text.boot")]
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unsafe extern "C" fn _start_primary() -> ! {
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// X0 = dtb
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core::arch::naked_asm!("
@@ -114,7 +113,6 @@ unsafe extern "C" fn _start_primary() -> ! {
114113
/// The earliest entry point for the secondary CPUs.
115114
#[cfg(feature = "smp")]
116115
#[unsafe(naked)]
117-
#[unsafe(link_section = ".text.boot")]
118116
pub(crate) unsafe extern "C" fn _start_secondary() -> ! {
119117
// X0 = stack pointer
120118
core::arch::naked_asm!("

platforms/axplat-aarch64-qemu-virt/src/power.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ impl PowerIf for PowerImpl {
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#[cfg(feature = "smp")]
1313
fn cpu_boot(cpu_id: usize, stack_top_paddr: usize) {
1414
use axplat::mem::{va, virt_to_phys};
15-
let entry_paddr = virt_to_phys(va!(crate::boot::_start_secondary as usize));
15+
let entry_paddr = virt_to_phys(va!(crate::boot::_start_secondary as *const () as usize));
1616
axplat_aarch64_peripherals::psci::cpu_on(cpu_id, entry_paddr.as_usize(), stack_top_paddr);
1717
}
1818

platforms/axplat-aarch64-raspi/src/boot.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,6 @@ unsafe extern "C" fn _start() -> ! {
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/// The earliest entry point for the secondary CPUs.
9696
#[cfg(feature = "smp")]
9797
#[unsafe(naked)]
98-
#[unsafe(link_section = ".text.boot")]
9998
pub(crate) unsafe extern "C" fn _start_secondary() -> ! {
10099
// X0 = stack pointer
101100
core::arch::naked_asm!("

platforms/axplat-loongarch64-qemu-virt/src/boot.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,6 @@ unsafe extern "C" fn _start() -> ! {
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#[cfg(feature = "smp")]
9393
#[unsafe(naked)]
9494
#[unsafe(no_mangle)]
95-
#[unsafe(link_section = ".text.boot")]
9695
unsafe extern "C" fn _start_secondary() -> ! {
9796
core::arch::naked_asm!("
9897
ori $t0, $zero, 0x1 # CSR_DMW1_PLV0

platforms/axplat-loongarch64-qemu-virt/src/mp.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,6 @@ pub fn start_secondary_cpu(cpu_id: usize, stack_top: PhysAddr) {
1616
unsafe {
1717
SMP_BOOT_STACK_TOP = stack_top_virt_addr;
1818
}
19-
csr_mail_send(_start_secondary as usize as _, cpu_id, 0);
19+
csr_mail_send(_start_secondary as *const () as _, cpu_id, 0);
2020
send_ipi_single(cpu_id, ACTION_BOOT_CPU);
2121
}

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