[refactor] rename axplat-aarch64-peripherals to axplat-arm-peripherals

Author: equation314

.github/workflows/check.yml

@@ -40,7 +40,7 @@ jobs:
         platform:
           - name: axplat-x86-pc
             target: x86_64-unknown-none
-          - name: axplat-aarch64-peripherals
+          - name: axplat-arm-peripherals
             target: aarch64-unknown-none
           - name: axplat-aarch64-qemu-virt
             target: aarch64-unknown-none

.github/workflows/docs.yml

@@ -12,7 +12,7 @@ jobs:
       - uses: dtolnay/rust-toolchain@nightly
 
       - name: Build docs
-        run: cargo doc --all-features --no-deps -p axplat -p axplat-macros -p axplat-aarch64-peripherals
+        run: cargo doc --all-features --no-deps -p axplat -p axplat-macros -p axplat-arm-peripherals
 
       - uses: actions/configure-pages@v5
       - uses: actions/upload-pages-artifact@v4

Cargo.lock

@@ -7,7 +7,7 @@ members = [
     "cargo-axplat",
 
     "platforms/axplat-x86-pc",
-    "platforms/axplat-aarch64-peripherals",
+    "platforms/axplat-arm-peripherals",
     "platforms/axplat-aarch64-qemu-virt",
     "platforms/axplat-aarch64-raspi",
     "platforms/axplat-aarch64-bsta1000b",
@@ -38,4 +38,7 @@ repository = "https://github.com/arceos-org/axplat_crates"
 axcpu = "0.2"
 axplat = { version = "0.4.0", path = "./axplat" }
 axplat-macros = { version = "0.2.0", path = "./axplat-macros" }
-axplat-aarch64-peripherals = { version = "0.3.0", path = "platforms/axplat-aarch64-peripherals" }
+axplat-arm-peripherals = { version = "0.3.0", path = "platforms/axplat-arm-peripherals" }
+
+[patch.crates-io]
+axcpu = { git = "https://github.com/arceos-org/axcpu.git" }

Cargo.toml

@@ -6,7 +6,7 @@ Reusable crates used for [ArceOS](https://github.com/arceos-org/arceos) Hardware
 
 * [axplat](./axplat)
 * [axplat-macros](./axplat-macros)
-* [axplat-aarch64-peripherals](./platforms/axplat-aarch64-peripherals)
+* [axplat-arm-peripherals](./platforms/axplat-arm-peripherals)
 
 ## Platform-specific crates
 

README.md

@@ -13,7 +13,7 @@ repository.workspace = true
 
 [features]
 fp-simd = ["axcpu/fp-simd"]
-irq = ["axplat/irq", "axplat-aarch64-peripherals/irq"]
+irq = ["axplat/irq", "axplat-arm-peripherals/irq"]
 rtc = []
 smp = ["axplat/smp", "kspin/smp"]
 
@@ -24,7 +24,7 @@ page_table_entry = "0.6"
 dw_apb_uart = "0.1"
 
 axconfig-macros = "0.2"
-axplat-aarch64-peripherals = { workspace = true }
+axplat-arm-peripherals = { workspace = true }
 axcpu = { workspace = true }
 axplat = { workspace = true }
 

platforms/axplat-aarch64-bsta1000b/Cargo.toml

@@ -37,7 +37,7 @@ pub fn init_early() {
 #[cfg(feature = "irq")]
 pub fn init_irq() {
     UART.lock().set_ier(true);
-    axplat_aarch64_peripherals::gic::register_handler(crate::config::devices::UART_IRQ, handle);
+    axplat_arm_peripherals::gic::register_handler(crate::config::devices::UART_IRQ, handle);
 }
 
 /// UART IRQ Handler

platforms/axplat-aarch64-bsta1000b/src/dw_apb_uart.rs

@@ -15,9 +15,9 @@ impl InitIf for InitIfImpl {
     /// early console, clocking).
     fn init_early(_cpu_id: usize, _dtb: usize) {
         axcpu::init::init_trap();
-        axplat_aarch64_peripherals::psci::init(PSCI_METHOD);
+        axplat_arm_peripherals::psci::init(PSCI_METHOD);
         super::dw_apb_uart::init_early();
-        axplat_aarch64_peripherals::generic_timer::init_early();
+        axplat_arm_peripherals::generic_timer::init_early();
     }
 
     /// Initializes the platform at the early stage for secondary cores.
@@ -36,12 +36,12 @@ impl InitIf for InitIfImpl {
         {
             use crate::mem::phys_to_virt;
             use axplat::mem::pa;
-            axplat_aarch64_peripherals::gic::init_gic(
+            axplat_arm_peripherals::gic::init_gic(
                 phys_to_virt(pa!(GICD_PADDR)),
                 phys_to_virt(pa!(GICC_PADDR)),
             );
-            axplat_aarch64_peripherals::gic::init_gicc();
-            axplat_aarch64_peripherals::generic_timer::enable_irqs(TIMER_IRQ);
+            axplat_arm_peripherals::gic::init_gicc();
+            axplat_arm_peripherals::generic_timer::enable_irqs(TIMER_IRQ);
 
             // enable UART IRQs
             crate::dw_apb_uart::init_irq();
@@ -53,8 +53,8 @@ impl InitIf for InitIfImpl {
     fn init_later_secondary(_cpu_id: usize) {
         #[cfg(feature = "irq")]
         {
-            axplat_aarch64_peripherals::gic::init_gicc();
-            axplat_aarch64_peripherals::generic_timer::enable_irqs(TIMER_IRQ);
+            axplat_arm_peripherals::gic::init_gicc();
+            axplat_arm_peripherals::generic_timer::enable_irqs(TIMER_IRQ);
         }
     }
 }