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lines changed Original file line number Diff line number Diff line change @@ -23,13 +23,13 @@ memory_addr.workspace = true
2323
2424# Target-specific dependencies
2525aarch64-cpu = { version = " 10.0" , optional = true }
26- x86_64 = { version = " 0.15" , optional = true }
26+ x86_64 = { version = " 0.15" , default-features = false , optional = true }
2727
2828[target .'cfg(target_arch = "aarch64")' .dependencies ]
2929aarch64-cpu = " 10.0"
3030
3131[target .'cfg(target_arch = "x86_64")' .dependencies ]
32- x86_64 = " 0.15"
32+ x86_64 = { version = " 0.15" , default-features = false }
3333
3434[package .metadata .docs .rs ]
3535all-features = true
Original file line number Diff line number Diff line change @@ -16,7 +16,7 @@ rust-version.workspace = true
1616default = []
1717copy-from = [" dep:bitmaps" ]
1818
19- all = [" page_table_entry/all" , " dep:riscv " , " dep:x86_64 " ]
19+ all = [" page_table_entry/all" ]
2020
2121[dependencies ]
2222log = " 0.4"
@@ -25,11 +25,10 @@ page_table_entry.workspace = true
2525bitmaps = { version = " 3.2" , default-features = false , optional = true }
2626
2727# Target-specific dependencies
28- riscv = { version = " 0.14" , default-features = false , optional = true }
29- x86_64 = { version = " 0.15" , optional = true }
30-
3128[target .'cfg(target_arch = "x86_64")' .dependencies ]
32- x86_64 = " 0.15"
29+ x86_64 = { version = " 0.15" , default-features = false , features = [
30+ " instructions" ,
31+ ] }
3332
3433[target .'cfg(any(target_arch = "riscv32", target_arch = "riscv64"))' .dependencies ]
3534riscv = { version = " 0.14" , default-features = false }
Original file line number Diff line number Diff line change @@ -12,11 +12,14 @@ pub trait SvVirtAddr: memory_addr::MemoryAddr + Send + Sync {
1212impl SvVirtAddr for memory_addr:: VirtAddr {
1313 #[ inline]
1414 fn flush_tlb ( vaddr : Option < Self > ) {
15+ #[ cfg( any( target_arch = "riscv32" , target_arch = "riscv64" ) ) ]
1516 if let Some ( vaddr) = vaddr {
1617 riscv:: asm:: sfence_vma ( 0 , vaddr. as_usize ( ) )
1718 } else {
1819 riscv:: asm:: sfence_vma_all ( ) ;
1920 }
21+ #[ cfg( not( any( target_arch = "riscv32" , target_arch = "riscv64" ) ) ) ]
22+ let _ = vaddr;
2023 }
2124}
2225
Original file line number Diff line number Diff line change @@ -14,11 +14,14 @@ impl PagingMetaData for X64PagingMetaData {
1414
1515 #[ inline]
1616 fn flush_tlb ( vaddr : Option < memory_addr:: VirtAddr > ) {
17+ #[ cfg( target_arch = "x86_64" ) ]
1718 if let Some ( vaddr) = vaddr {
1819 x86_64:: instructions:: tlb:: flush ( x86_64:: VirtAddr :: new ( vaddr. as_usize ( ) as u64 ) ) ;
1920 } else {
2021 x86_64:: instructions:: tlb:: flush_all ( ) ;
2122 }
23+ #[ cfg( not( target_arch = "x86_64" ) ) ]
24+ let _ = vaddr;
2225 }
2326}
2427
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