chore: update memory_addr

Author: AsakuraMizu

Cargo.lock

@@ -1,10 +1,7 @@
 [workspace]
 resolver = "2"
 
-members = [
-    "page_table_multiarch",
-    "page_table_entry",
-]
+members = ["page_table_multiarch", "page_table_entry"]
 
 [workspace.package]
 version = "0.5.3"
@@ -17,3 +14,6 @@ repository = "https://github.com/arceos-org/page_table_multiarch"
 keywords = ["arceos", "paging", "page-table", "virtual-memory"]
 categories = ["os", "hardware-support", "memory-management", "no-std"]
 rust-version = "1.85"
+
+[workspace.dependencies]
+memory_addr = "0.4"

Cargo.toml

@@ -17,7 +17,7 @@ arm-el2 = []
 
 [dependencies]
 bitflags = "2.6"
-memory_addr = "0.3"
+memory_addr.workspace = true
 
 [target.'cfg(any(target_arch = "aarch64", doc))'.dependencies]
 aarch64-cpu = "10.0"
@@ -26,4 +26,4 @@ aarch64-cpu = "10.0"
 x86_64 = "0.15.2"
 
 [package.metadata.docs.rs]
-rustc-args = [ "--cfg" , "doc"]
+rustc-args = ["--cfg", "doc"]

page_table_entry/Cargo.toml

@@ -14,7 +14,7 @@ rust-version.workspace = true
 
 [dependencies]
 log = "0.4"
-memory_addr = "0.3"
+memory_addr.workspace = true
 page_table_entry = { path = "../page_table_entry", version = "0.5.2" }
 
 [target.'cfg(any(target_arch = "x86_64", doc))'.dependencies]
@@ -24,4 +24,4 @@ x86 = "0.52"
 riscv = { version = "0.12", default-features = false }
 
 [package.metadata.docs.rs]
-rustc-args = [ "--cfg" , "doc"]
+rustc-args = ["--cfg", "doc"]