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| 1 | +/* Application starts from 1kB memory - Bootloader size is 1kB |
| 2 | +Change the address if higher boot size is needed |
| 3 | +good site for quick conversions. |
| 4 | +http://www.binaryhexconverter.com/hex-to-decimal-converter */ |
| 5 | + |
| 6 | +#include "nvm.h" |
| 7 | + |
| 8 | +/** If \c false, a page write command will be issued automatically when the |
| 9 | + page buffer is full. */ |
| 10 | +bool manual_page_write; |
| 11 | + |
| 12 | +uint8_t data_8 = 1; |
| 13 | +uint32_t file_size, i, dest_addr; |
| 14 | +uint32_t volatile app_start_address; |
| 15 | +uint8_t volatile data_from_flash; |
| 16 | +uint32_t *flash_ptr; |
| 17 | +uint8_t *flash_byte_ptr; |
| 18 | + |
| 19 | +/* Flash page size is 64 bytes */ |
| 20 | +uint16_t PAGE_SIZE = (8 << NVMCTRL->PARAM.bit.PSZ); //used to read and write to flash. |
| 21 | + |
| 22 | +void erase_all() { |
| 23 | + /* erase all */ |
| 24 | + for (int i = APP_START; i < FLASH_SIZE; i = i + PAGE_SIZE) |
| 25 | + { |
| 26 | + nvm_erase_row(i, PAGE_SIZE); |
| 27 | + } |
| 28 | +} |
| 29 | + |
| 30 | +#define SKETCH_START (uint32_t*)(APP_START) |
| 31 | + |
| 32 | +void boot_app() { |
| 33 | + // jump to the sketch |
| 34 | + __set_MSP(*SKETCH_START); |
| 35 | + |
| 36 | + //Reset vector table address |
| 37 | + SCB->VTOR = ((uint32_t)(SKETCH_START) & SCB_VTOR_TBLOFF_Msk); |
| 38 | + |
| 39 | + // address of Reset_Handler is written by the linker at the beginning of the .text section (see linker script) |
| 40 | + uint32_t resetHandlerAddress = (uint32_t) * (SKETCH_START + 1); |
| 41 | + // jump to reset handler |
| 42 | + asm("bx %0"::"r"(resetHandlerAddress)); |
| 43 | +} |
| 44 | + |
| 45 | +void setup_ptrs() |
| 46 | +{ |
| 47 | + //set values, for flash pointers. |
| 48 | + dest_addr = APP_START; |
| 49 | + flash_ptr = (uint32_t*)APP_START; |
| 50 | + app_start_address = *flash_ptr; |
| 51 | + flash_byte_ptr = (uint8_t*)APP_START; |
| 52 | +} |
| 53 | + |
| 54 | +void nvm_erase_row(const uint32_t row_address, uint32_t PAGE_SIZE) |
| 55 | +{ |
| 56 | +#if 0 |
| 57 | + /* Check if the address to erase is not aligned to the start of a row */ |
| 58 | + if (row_address > ((uint32_t)_nvm_dev.page_size * _nvm_dev.number_of_pages)) |
| 59 | + { |
| 60 | + return 0; |
| 61 | + } |
| 62 | + |
| 63 | + /* Get a pointer to the module hardware instance */ |
| 64 | + if (row_address & ((_nvm_dev.page_size * NVMCTRL_ROW_PAGES) - 1)) |
| 65 | + { |
| 66 | + return 0; |
| 67 | + } |
| 68 | +#endif |
| 69 | + |
| 70 | + /* Check if the module is busy */ |
| 71 | + while (!NVMCTRL->INTFLAG.bit.READY); |
| 72 | + |
| 73 | + /* Clear error flags */ |
| 74 | + NVMCTRL->STATUS.reg &= ~NVMCTRL_STATUS_MASK; |
| 75 | + |
| 76 | + while (!(NVMCTRL->INTFLAG.bit.READY)); |
| 77 | + |
| 78 | + /* Set address and command */ |
| 79 | + NVMCTRL->ADDR.reg = (uintptr_t)&NVM_MEMORY[row_address / 4]; |
| 80 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_ER; |
| 81 | + while (!(NVMCTRL->INTFLAG.bit.READY)); |
| 82 | + |
| 83 | +} |
| 84 | + |
| 85 | +void nvm_write_buffer(uint32_t destination_address, const uint8_t *buffer, uint16_t length) |
| 86 | +{ |
| 87 | +#if 0 |
| 88 | + |
| 89 | + /* Check if the destination address is valid */ |
| 90 | + if (destination_address > |
| 91 | + ((uint32_t)_nvm_dev.page_size * _nvm_dev.number_of_pages)) { |
| 92 | + return 0; |
| 93 | + } |
| 94 | + |
| 95 | + /* Check if the write address not aligned to the start of a page */ |
| 96 | + if (destination_address & (_nvm_dev.page_size - 1)) { |
| 97 | + return 0; |
| 98 | + } |
| 99 | + |
| 100 | + /* Check if the write length is longer than a NVM page */ |
| 101 | + if (length > _nvm_dev.page_size) { |
| 102 | + return 0; |
| 103 | + } |
| 104 | +#endif |
| 105 | + |
| 106 | + /* Check if the module is busy */ |
| 107 | + while (!NVMCTRL->INTFLAG.bit.READY); |
| 108 | + |
| 109 | + //set auto page writes |
| 110 | + NVMCTRL->CTRLB.bit.MANW = 0; |
| 111 | + |
| 112 | + /* Erase the page buffer before buffering new data */ |
| 113 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY; |
| 114 | + |
| 115 | + /* Check if the module is busy */ |
| 116 | + while (!NVMCTRL->INTFLAG.bit.READY); |
| 117 | + |
| 118 | + /* Clear error flags */ |
| 119 | + NVMCTRL->STATUS.reg &= ~NVMCTRL_STATUS_MASK; |
| 120 | + |
| 121 | + uint32_t nvm_address = destination_address / 2; |
| 122 | + |
| 123 | + /* NVM _must_ be accessed as a series of 16-bit words, perform manual copy |
| 124 | + to ensure alignment */ |
| 125 | + for (uint16_t k = 0; k < length; k += 2) |
| 126 | + { |
| 127 | + uint16_t data; |
| 128 | + |
| 129 | + /* Copy first byte of the 16-bit chunk to the temporary buffer */ |
| 130 | + data = buffer[k]; |
| 131 | + |
| 132 | + /* If we are not at the end of a write request with an odd byte count, |
| 133 | + store the next byte of data as well */ |
| 134 | + if (k < (length - 1)) { |
| 135 | + data |= (buffer[k + 1] << 8); |
| 136 | + } |
| 137 | + /* Store next 16-bit chunk to the NVM memory space */ |
| 138 | + NVM_MEMORY[nvm_address++] = data; |
| 139 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_WP; |
| 140 | + |
| 141 | + } |
| 142 | + |
| 143 | + /* If automatic page write mode is enable, then perform a manual NVM |
| 144 | + write when the length of data to be programmed is less than page size |
| 145 | + */ |
| 146 | + if ((manual_page_write == 0) && (length < NVMCTRL_PAGE_SIZE)) { |
| 147 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMDEX_KEY | NVMCTRL_CTRLA_CMD_WP; |
| 148 | + } |
| 149 | + |
| 150 | + while (!NVMCTRL->INTFLAG.bit.READY); |
| 151 | +} |
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