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1 | 1 | #include "H7_Video.h"
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| 2 | + |
2 | 3 | #include "dsi.h"
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3 |
| -#include "video_driver.h" |
4 | 4 | #include "display.h"
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| 5 | +#include "SDRAM.h" |
| 6 | +#include "video_modes.h" |
| 7 | +#include "anx7625.h" |
5 | 8 |
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6 | 9 | #if __has_include ("lvgl.h")
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7 | 10 | #include "lvgl.h"
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@@ -34,13 +37,74 @@ int H7_Video::begin(bool landscape) {
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34 | 37 |
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35 | 38 | #if defined(ARDUINO_PORTENTA_H7_M7)
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36 | 39 | if (_shield == NONE_SHIELD) {
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37 |
| - portenta_init_video(); |
| 40 | + struct edid recognized_edid; |
| 41 | + int err_code = 0; |
| 42 | + |
| 43 | + //Initialization of ANX7625 |
| 44 | + err_code = anx7625_init(0); |
| 45 | + if(err_code < 0) { |
| 46 | + return err_code; |
| 47 | + } |
| 48 | + |
| 49 | + //Checking HDMI plug event |
| 50 | + anx7625_wait_hpd_event(0); |
| 51 | + |
| 52 | + //Read EDID |
| 53 | + anx7625_dp_get_edid(0, &recognized_edid); |
| 54 | + |
| 55 | + //DSI Configuration |
| 56 | + anx7625_dp_start(0, &recognized_edid, EDID_MODE_720x480_60Hz); |
| 57 | + |
| 58 | + //Configure SDRAM |
| 59 | + SDRAM.begin(getFramebufferEnd()); |
38 | 60 | } else if (_shield == GIGA_DISPLAY_SHIELD) {
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39 |
| - giga_init_video(); |
| 61 | + #define EDID_MODE_SELECTED EDID_MODE_480x800_60Hz |
| 62 | + struct edid _edid; |
| 63 | + struct display_timing dt; |
| 64 | + |
| 65 | + //DSI Configuration |
| 66 | + dt.pixelclock = envie_known_modes[EDID_MODE_SELECTED].pixel_clock; |
| 67 | + dt.hactive = envie_known_modes[EDID_MODE_SELECTED].hactive; |
| 68 | + dt.hsync_len = envie_known_modes[EDID_MODE_SELECTED].hsync_len; |
| 69 | + dt.hback_porch = envie_known_modes[EDID_MODE_SELECTED].hback_porch; |
| 70 | + dt.hfront_porch = envie_known_modes[EDID_MODE_SELECTED].hfront_porch; |
| 71 | + dt.vactive = envie_known_modes[EDID_MODE_SELECTED].vactive; |
| 72 | + dt.vsync_len = envie_known_modes[EDID_MODE_SELECTED].vsync_len; |
| 73 | + dt.vback_porch = envie_known_modes[EDID_MODE_SELECTED].vback_porch; |
| 74 | + dt.vfront_porch = envie_known_modes[EDID_MODE_SELECTED].vfront_porch; |
| 75 | + dt.hpol = envie_known_modes[EDID_MODE_SELECTED].hpol; |
| 76 | + dt.vpol = envie_known_modes[EDID_MODE_SELECTED].vpol; |
| 77 | + stm32_dsi_config(0, &_edid, &dt); |
| 78 | + |
| 79 | + //Configure SDRAM |
| 80 | + SDRAM.begin(); |
| 81 | + |
| 82 | + //Init LCD Controller |
40 | 83 | LCD_ST7701_Init();
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41 | 84 | }
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42 | 85 | #elif defined(ARDUINO_GIGA)
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43 |
| - giga_init_video(); |
| 86 | + #define EDID_MODE_SELECTED EDID_MODE_480x800_60Hz |
| 87 | + struct edid _edid; |
| 88 | + struct display_timing dt; |
| 89 | + |
| 90 | + //DSI Configuration |
| 91 | + dt.pixelclock = envie_known_modes[EDID_MODE_SELECTED].pixel_clock; |
| 92 | + dt.hactive = envie_known_modes[EDID_MODE_SELECTED].hactive; |
| 93 | + dt.hsync_len = envie_known_modes[EDID_MODE_SELECTED].hsync_len; |
| 94 | + dt.hback_porch = envie_known_modes[EDID_MODE_SELECTED].hback_porch; |
| 95 | + dt.hfront_porch = envie_known_modes[EDID_MODE_SELECTED].hfront_porch; |
| 96 | + dt.vactive = envie_known_modes[EDID_MODE_SELECTED].vactive; |
| 97 | + dt.vsync_len = envie_known_modes[EDID_MODE_SELECTED].vsync_len; |
| 98 | + dt.vback_porch = envie_known_modes[EDID_MODE_SELECTED].vback_porch; |
| 99 | + dt.vfront_porch = envie_known_modes[EDID_MODE_SELECTED].vfront_porch; |
| 100 | + dt.hpol = envie_known_modes[EDID_MODE_SELECTED].hpol; |
| 101 | + dt.vpol = envie_known_modes[EDID_MODE_SELECTED].vpol; |
| 102 | + stm32_dsi_config(0, &_edid, &dt); |
| 103 | + |
| 104 | + //Configure SDRAM |
| 105 | + SDRAM.begin(); |
| 106 | + |
| 107 | + //Init LCD Controller |
44 | 108 | LCD_ST7701_Init();
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45 | 109 | #else
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46 | 110 | #error Board not compatible with this library
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