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cmagliecmaglie
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Merge branch 'zero' into adc-dac-fix
Conflicts: hardware/arduino/samd/cores/arduino/wiring.c hardware/arduino/samd/cores/arduino/wiring_analog.c
2 parents df01520 + 56c096b commit e7d9d28

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8 files changed

+1228
-71
lines changed

8 files changed

+1228
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lines changed

‎cores/arduino/delay.h

Lines changed: 31 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -60,39 +60,42 @@ extern void delay( uint32_t dwMs ) ;
6060
*
6161
* \param dwUs the number of microseconds to pause (uint32_t)
6262
*/
63-
static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused));
64-
static inline void delayMicroseconds(uint32_t usec){
65-
if (usec == 0) return;
66-
uint32_t n = usec * (VARIANT_MCK / 3000000);
67-
#if 0
68-
__asm__ volatile(
69-
"L_%=_delayMicroseconds:" "\n\t"
70-
"subs %0, %0, #1" "\n\t"
71-
"bne L_%=_delayMicroseconds" "\n"
72-
: "+r" (n) :
73-
);
74-
#else
75-
for ( ; n != 0 ; n-- )
63+
static __inline__ void delayMicroseconds( uint32_t ) __attribute__((always_inline, unused)) ;
64+
static __inline__ void delayMicroseconds( uint32_t usec )
65+
{
66+
if ( usec == 0 )
7667
{
68+
return ;
7769
}
78-
#endif
79-
}
8070

81-
/*
82-
__attribute__((naked)) static void delay_loop(unsigned n)
83-
{
84-
__asm volatile ("1: subs r0, r0, #1");
85-
__asm volatile (" bne 1b");
86-
__asm volatile (" bx lr");
87-
}
71+
/*
72+
* The following loop:
73+
*
74+
* for (; ul; ul--) {
75+
* __asm__ volatile("");
76+
* }
77+
*
78+
* produce the following assembly code:
79+
*
80+
* loop:
81+
* subs r3, #1 // 1 Core cycle
82+
* bne.n loop // 1 Core cycle + 1 if branch is taken
83+
*/
8884

89-
void delay_microseconds(unsigned n)
90-
{
91-
// Bogus assumption:
92-
// Assume 8 cycles/iteration and running at 80MHz
93-
delay_loop(n * 10);
85+
// VARIANT_MCK / 1000000 == cycles needed to delay 1uS
86+
// 3 == cycles used in a loop
87+
uint32_t n = usec * (VARIANT_MCK / 1000000) / 3;
88+
__asm__ __volatile__(
89+
"1: \n"
90+
" sub %0, #1 \n" // substract 1 from %0 (n)
91+
" bne 1b \n" // if result is not 0 jump to 1
92+
: "+r" (n) // '%0' is n variable with RW constraints
93+
: // no input
94+
: // no clobber
95+
);
96+
// https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html
97+
// https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Volatile
9498
}
95-
*/
9699

97100
#ifdef __cplusplus
98101
}

‎cores/arduino/wiring.c

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,8 @@
1616
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
1717
*/
1818

19-
//#include "Arduino.h"
2019
#include "variant.h"
21-
//#include "wiring_constants.h"
20+
#include "wiring_analog.h"
2221
#include "wiring_digital.h"
2322
#include "wiring.h"
2423

@@ -27,7 +26,7 @@ extern "C" {
2726
#endif
2827

2928
/*
30-
* System Core Clock is at 1MHz at Reset.
29+
* System Core Clock is at 1MHz (8MHz/8) at Reset.
3130
* It is switched to 48MHz in the Reset Handler (startup.c)
3231
*/
3332
uint32_t SystemCoreClock=1000000ul ;
@@ -80,7 +79,7 @@ void init( void )
8079
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;
8180

8281
// Clock TC/TCC for Pulse and Analog
83-
PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 | PM_APBCMASK_TC6 | PM_APBCMASK_TC7 ;
82+
PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 ;
8483

8584
// Clock ADC/DAC for Analog
8685
PM->APBCMASK.reg |= PM_APBCMASK_ADC | PM_APBCMASK_DAC ;
@@ -114,10 +113,7 @@ void init( void )
114113
ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_64 | // 64 samples
115114
ADC_AVGCTRL_ADJRES(0x04ul); // Adjusting result by 4
116115

117-
while( ADC->STATUS.bit.SYNCBUSY == 1 ); // Wait for synchronization of registers between the clock domains
118-
119-
ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
120-
ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
116+
analogReference( AR_DEFAULT ) ; // Analog Reference is AREF pin (3.3v)
121117

122118
// Initialize DAC
123119
// Setting clock

‎cores/arduino/wiring_analog.c

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -18,13 +18,14 @@
1818

1919
#include "wiring_analog.h"
2020
#include "wiring_digital.h"
21+
#include "variant.h"
2122

2223
#ifdef __cplusplus
2324
extern "C" {
2425
#endif
2526

2627
static int _readResolution = 10;
27-
static int _writeResolution = 8;
28+
static int _writeResolution = 10;
2829

2930
void analogReadResolution( int res )
3031
{
@@ -68,6 +69,12 @@ static inline uint32_t mapResolution( uint32_t value, uint32_t from, uint32_t to
6869
}
6970
}
7071

72+
/*
73+
* Internal Reference is at 1.0v
74+
* External Reference should be between 1v and VDDANA-0.6v=2.7v
75+
*
76+
* Warning : On Arduino Zero board the input/output voltage for SAMD21G18 is 3.3 volts maximum
77+
*/
7178
void analogReference( eAnalogReference ulMode )
7279
{
7380
while ( ADC->STATUS.bit.SYNCBUSY == 1 );
@@ -106,7 +113,12 @@ uint32_t analogRead( uint32_t ulPin )
106113
{
107114
uint32_t valueRead = 0;
108115

109-
if (ulPin < A0) ulPin += A0;
116+
if ( ulPin < A0 )
117+
{
118+
ulPin += A0 ;
119+
}
120+
121+
pinPeripheral(ulPin, g_APinDescription[ulPin].ulPinType);
110122

111123
if (ulPin == A0) // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
112124
{
@@ -134,7 +146,7 @@ uint32_t analogRead( uint32_t ulPin )
134146

135147
// Control A
136148
/*
137-
* Bit 1 – ENABLE: Enable
149+
* Bit 1 ENABLE: Enable
138150
* 0: The ADC is disabled.
139151
* 1: The ADC is enabled.
140152
* Due to synchronization, there is a delay from writing CTRLA.ENABLE until the peripheral is enabled/disabled. The

‎cores/arduino/wiring_analog.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#ifndef _WIRING_ANALOG_
2020
#define _WIRING_ANALOG_
2121

22-
#include <Arduino.h>
22+
#include <stdint.h>
2323

2424
#ifdef __cplusplus
2525
extern "C" {

‎cores/validation/validation_firmata/build_as6/test.atsln

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+

2+
Microsoft Visual Studio Solution File, Format Version 11.00
3+
# Atmel Studio Solution File, Format Version 11.00
4+
Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
5+
EndProject
6+
Global
7+
GlobalSection(SolutionConfigurationPlatforms) = preSolution
8+
Debug|ARM = Debug|ARM
9+
Release|ARM = Release|ARM
10+
EndGlobalSection
11+
GlobalSection(ProjectConfigurationPlatforms) = postSolution
12+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
13+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
14+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
15+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
16+
EndGlobalSection
17+
GlobalSection(SolutionProperties) = preSolution
18+
HideSolutionNode = FALSE
19+
EndGlobalSection
20+
EndGlobal

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