@@ -562,6 +562,11 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE |
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(ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS ) |
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(need_pre (dev_addr ) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0 );
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+ // START_TRANS bit on SIE_CTRL seems to exhibit the same behavior as the AVAILABLE bit
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+ // described in RP2040 Datasheet, release 2.1, section "4.1.2.5.1. Concurrent access".
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+ // We write everything except the START_TRANS bit first, then wait some cycles.
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+ usb_hw -> sie_ctrl = flags & ~USB_SIE_CTRL_START_TRANS_BITS ;
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+ busy_wait_at_least_cycles (12 );
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usb_hw -> sie_ctrl = flags ;
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}else
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{
@@ -602,6 +607,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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uint32_t const flags = SIE_CTRL_BASE | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS |
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(need_pre (dev_addr ) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0 );
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+ // START_TRANS bit on SIE_CTRL seems to exhibit the same behavior as the AVAILABLE bit
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+ // described in RP2040 Datasheet, release 2.1, section "4.1.2.5.1. Concurrent access".
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+ // We write everything except the START_TRANS bit first, then wait some cycles.
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+ usb_hw -> sie_ctrl = flags & ~USB_SIE_CTRL_START_TRANS_BITS ;
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+ busy_wait_at_least_cycles (12 );
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usb_hw -> sie_ctrl = flags ;
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return true;
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