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3 files changed

+104
-35
lines changed

3 files changed

+104
-35
lines changed

src/portable/renesas/link/dcd_link.c

Lines changed: 46 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -31,10 +31,8 @@
3131
// We disable SOF for now until needed later on
3232
#define USE_SOF 0
3333

34-
#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
35-
CFG_TUSB_MCU == OPT_MCU_RX65X || \
36-
CFG_TUSB_MCU == OPT_MCU_RX72N || \
37-
CFG_TUSB_MCU == OPT_MCU_RAXXX)
34+
#if CFG_TUD_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
35+
TU_CHECK_MCU(OPT_MCU_RAXXX))
3836

3937
#include "device/dcd.h"
4038
#include "link_type.h"
@@ -250,8 +248,9 @@ static bool pipe0_xfer_in(void)
250248
pipe->buf = (uint8_t*)buf + len;
251249
}
252250
}
253-
if (len < mps)
251+
if (len < mps) {
254252
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
253+
}
255254
pipe->remaining = rem - len;
256255
return false;
257256
}
@@ -273,8 +272,9 @@ static bool pipe0_xfer_out(void)
273272
pipe->buf = (uint8_t*)buf + len;
274273
}
275274
}
276-
if (len < mps)
275+
if (len < mps) {
277276
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
277+
}
278278
pipe->remaining = rem - len;
279279
if ((len < mps) || (rem == len)) {
280280
pipe->buf = NULL;
@@ -306,10 +306,11 @@ static bool pipe_xfer_in(unsigned num)
306306
pipe->buf = (uint8_t*)buf + len;
307307
}
308308
}
309-
if (len < mps)
309+
if (len < mps) {
310310
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
311+
}
311312
LINK_REG->D0FIFOSEL = 0;
312-
while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
313+
while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
313314
pipe->remaining = rem - len;
314315
return false;
315316
}
@@ -333,10 +334,11 @@ static bool pipe_xfer_out(unsigned num)
333334
pipe->buf = (uint8_t*)buf + len;
334335
}
335336
}
336-
if (len < mps)
337+
if (len < mps) {
337338
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
339+
}
338340
LINK_REG->D0FIFOSEL = 0;
339-
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
341+
while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
340342
pipe->remaining = rem - len;
341343
if ((len < mps) || (rem == len)) {
342344
pipe->buf = NULL;
@@ -377,7 +379,7 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
377379
/* configure fifo direction and access unit settings */
378380
if (ep_addr) { /* IN, 2 bytes */
379381
LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
380-
(TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
382+
(TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
381383
while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
382384
} else { /* OUT, a byte */
383385
LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
@@ -541,10 +543,43 @@ static void process_set_address(uint8_t rhport)
541543
/*------------------------------------------------------------------*/
542544
/* Device API
543545
*------------------------------------------------------------------*/
546+
547+
#if 0 // previously present in the rx driver before generalization
548+
static uint32_t disable_interrupt(void)
549+
{
550+
uint32_t pswi;
551+
#if defined(__CCRX__)
552+
pswi = get_psw() & 0x010000;
553+
clrpsw_i();
554+
#else
555+
pswi = __builtin_rx_mvfc(0) & 0x010000;
556+
__builtin_rx_clrpsw('I');
557+
#endif
558+
return pswi;
559+
}
560+
561+
static void enable_interrupt(uint32_t pswi)
562+
{
563+
#if defined(__CCRX__)
564+
set_psw(get_psw() | pswi);
565+
#else
566+
__builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
567+
#endif
568+
}
569+
#endif
570+
544571
void dcd_init(uint8_t rhport)
545572
{
546573
(void)rhport;
547574

575+
#if 0 // previously present in the rx driver before generalization
576+
uint32_t pswi = disable_interrupt();
577+
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
578+
MSTP(USB0) = 0;
579+
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
580+
enable_interrupt(pswi);
581+
#endif
582+
548583
LINK_REG->SYSCFG_b.SCKE = 1;
549584
while (!LINK_REG->SYSCFG_b.SCKE) ;
550585
LINK_REG->SYSCFG_b.DRPD = 0;

src/portable/renesas/link/hcd_link.c

Lines changed: 55 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -27,10 +27,8 @@
2727

2828
#include "tusb_option.h"
2929

30-
#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
31-
CFG_TUSB_MCU == OPT_MCU_RX65X || \
32-
CFG_TUSB_MCU == OPT_MCU_RX72N || \
33-
CFG_TUSB_MCU == OPT_MCU_RAXXX)
30+
#if CFG_TUH_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
31+
TU_CHECK_MCU(OPT_MCU_RAXXX))
3432

3533
#include "host/hcd.h"
3634
#include "link_type.h"
@@ -217,8 +215,9 @@ static bool pipe0_xfer_in(void)
217215
pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
218216
pipe->buf = (uint8_t*)buf + len;
219217
}
220-
if (len < mps)
218+
if (len < mps) {
221219
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
220+
}
222221
pipe->remaining = rem - len;
223222
if ((len < mps) || (rem == len)) {
224223
pipe->buf = NULL;
@@ -243,8 +242,9 @@ static bool pipe0_xfer_out(void)
243242
pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
244243
pipe->buf = (uint8_t*)buf + len;
245244
}
246-
if (len < mps)
245+
if (len < mps) {
247246
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
247+
}
248248
pipe->remaining = rem - len;
249249
return false;
250250
}
@@ -264,8 +264,9 @@ static bool pipe_xfer_in(unsigned num)
264264
pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
265265
pipe->buf = (uint8_t*)buf + len;
266266
}
267-
if (len < mps)
267+
if (len < mps) {
268268
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
269+
}
269270
LINK_REG->D0FIFOSEL = 0;
270271
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
271272
pipe->remaining = rem - len;
@@ -314,7 +315,7 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
314315
while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
315316
} else { /* OUT, 2 bytes */
316317
LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
317-
(TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
318+
(TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
318319
while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
319320
}
320321

@@ -363,7 +364,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
363364
pipe_wait_for_ready(num);
364365
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
365366
LINK_REG->D0FIFOSEL = 0;
366-
while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
367+
while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
367368
}
368369
} else {
369370
volatile uint16_t *ctr = get_pipectr(num);
@@ -447,10 +448,43 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
447448
/*------------------------------------------------------------------*/
448449
/* Host API
449450
*------------------------------------------------------------------*/
451+
452+
#if 0 // previously present in the rx driver before generalization
453+
static uint32_t disable_interrupt(void)
454+
{
455+
uint32_t pswi;
456+
#if defined(__CCRX__)
457+
pswi = get_psw() & 0x010000;
458+
clrpsw_i();
459+
#else
460+
pswi = __builtin_rx_mvfc(0) & 0x010000;
461+
__builtin_rx_clrpsw('I');
462+
#endif
463+
return pswi;
464+
}
465+
466+
static void enable_interrupt(uint32_t pswi)
467+
{
468+
#if defined(__CCRX__)
469+
set_psw(get_psw() | pswi);
470+
#else
471+
__builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
472+
#endif
473+
}
474+
#endif
475+
450476
bool hcd_init(uint8_t rhport)
451477
{
452478
(void)rhport;
453479

480+
#if 0 // previously present in the rx driver before generalization
481+
uint32_t pswi = disable_interrupt();
482+
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
483+
MSTP(USB0) = 0;
484+
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
485+
enable_interrupt(pswi);
486+
#endif
487+
454488
LINK_REG->SYSCFG_b.SCKE = 1;
455489
while (!LINK_REG->SYSCFG_b.SCKE) ;
456490
LINK_REG->SYSCFG_b.DPRPU = 0;
@@ -470,7 +504,7 @@ bool hcd_init(uint8_t rhport)
470504
LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
471505

472506
/* Setup default control pipe */
473-
LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk;
507+
LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk;
474508
LINK_REG->DCPMAXP = 64;
475509
LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk;
476510
LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk;
@@ -515,8 +549,9 @@ void hcd_port_reset(uint8_t rhport)
515549
while (LINK_REG->DCPCTR_b.PBUSY) ;
516550
hcd_int_disable(rhport);
517551
LINK_REG->DVSTCTR0_b.UACT = 0;
518-
if (LINK_REG->DCPCTR_b.SUREQ)
552+
if (LINK_REG->DCPCTR_b.SUREQ) {
519553
LINK_REG->DCPCTR_b.SUREQCLR = 1;
554+
}
520555
hcd_int_enable(rhport);
521556
/* Reset should be asserted 10-20ms. */
522557
LINK_REG->DVSTCTR0_b.USBRST = 1;
@@ -580,10 +615,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
580615

581616
LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
582617

583-
_hcd.pipe[0].buf = NULL;
584-
_hcd.pipe[0].length = 8;
618+
_hcd.pipe[0].buf = NULL;
619+
_hcd.pipe[0].length = 8;
585620
_hcd.pipe[0].remaining = 0;
586-
_hcd.pipe[0].dev = dev_addr;
621+
_hcd.pipe[0].dev = dev_addr;
587622

588623
while (LINK_REG->DCPCTR_b.PBUSY) ;
589624
LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
@@ -593,8 +628,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
593628
LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
594629

595630
uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
596-
LINK_REG->USBREQ = tu_htole16(p[0]);
597-
LINK_REG->USBVAL = p[1];
631+
LINK_REG->USBREQ = tu_htole16(p[0]);
632+
LINK_REG->USBVAL = p[1];
598633
LINK_REG->USBINDX = p[2];
599634
LINK_REG->USBLENG = p[3];
600635

@@ -717,12 +752,10 @@ void hcd_int_handler(uint8_t rhport)
717752
if (is1 & LINK_REG_INTSTS1_SACK_Msk) {
718753
/* Set DATA1 in advance for the next transfer. */
719754
LINK_REG->DCPCTR_b.SQSET = 1;
720-
hcd_event_xfer_complete(
721-
LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
755+
hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
722756
}
723757
if (is1 & LINK_REG_INTSTS1_SIGN_Msk) {
724-
hcd_event_xfer_complete(
725-
LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
758+
hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
726759
}
727760
if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) {
728761
LINK_REG->DVSTCTR0_b.UACT = 1;
@@ -732,8 +765,9 @@ void hcd_int_handler(uint8_t rhport)
732765
}
733766
if (is1 & LINK_REG_INTSTS1_DTCH_Msk) {
734767
LINK_REG->DVSTCTR0_b.UACT = 0;
735-
if (LINK_REG->DCPCTR_b.SUREQ)
768+
if (LINK_REG->DCPCTR_b.SUREQ) {
736769
LINK_REG->DCPCTR_b.SUREQCLR = 1;
770+
}
737771
LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk;
738772
hcd_event_device_remove(rhport, true);
739773
}

src/portable/renesas/link/link_rx.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ extern "C" {
3939

4040
#define LINK_REG_BASE (0x000A0000)
4141

42-
static inline void link_int_enable(uint8_t rhport)
42+
TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport)
4343
{
4444
(void) rhport;
4545
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -49,7 +49,7 @@ static inline void link_int_enable(uint8_t rhport)
4949
#endif
5050
}
5151

52-
static inline void link_int_disable(uint8_t rhport)
52+
TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport)
5353
{
5454
(void) rhport;
5555
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -60,7 +60,7 @@ static inline void link_int_disable(uint8_t rhport)
6060
}
6161

6262
// MCU specific PHY init
63-
static inline void link_phy_init(void)
63+
TU_ATTR_ALWAYS_INLINE static inline void link_phy_init(void)
6464
{
6565
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
6666
IR(PERIB, INTB185) = 0;

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