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#include "tusb_option.h"
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- #if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
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- CFG_TUSB_MCU == OPT_MCU_RX65X || \
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- CFG_TUSB_MCU == OPT_MCU_RX72N || \
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- CFG_TUSB_MCU == OPT_MCU_RAXXX )
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+ #if CFG_TUH_ENABLED && (TU_CHECK_MCU (OPT_MCU_RX63X , OPT_MCU_RX65X , OPT_MCU_RX72N ) || \
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+ TU_CHECK_MCU (OPT_MCU_RAXXX ))
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#include "host/hcd.h"
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#include "link_type.h"
@@ -217,8 +215,9 @@ static bool pipe0_xfer_in(void)
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pipe_read_packet (buf , (volatile void * )& LINK_REG -> CFIFO , len );
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pipe -> buf = (uint8_t * )buf + len ;
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}
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- if (len < mps )
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+ if (len < mps ) {
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LINK_REG -> CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk ;
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+ }
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pipe -> remaining = rem - len ;
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if ((len < mps ) || (rem == len )) {
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pipe -> buf = NULL ;
@@ -243,8 +242,9 @@ static bool pipe0_xfer_out(void)
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pipe_write_packet (buf , (volatile void * )& LINK_REG -> CFIFO , len );
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pipe -> buf = (uint8_t * )buf + len ;
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}
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- if (len < mps )
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+ if (len < mps ) {
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LINK_REG -> CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk ;
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+ }
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pipe -> remaining = rem - len ;
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return false;
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}
@@ -264,8 +264,9 @@ static bool pipe_xfer_in(unsigned num)
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pipe_read_packet (buf , (volatile void * )& LINK_REG -> D0FIFO , len );
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pipe -> buf = (uint8_t * )buf + len ;
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}
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- if (len < mps )
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+ if (len < mps ) {
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LINK_REG -> D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk ;
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+ }
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LINK_REG -> D0FIFOSEL = 0 ;
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while (LINK_REG -> D0FIFOSEL_b .CURPIPE ) ; /* if CURPIPE bits changes, check written value */
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pipe -> remaining = rem - len ;
@@ -314,7 +315,7 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
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while (LINK_REG -> CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE ) ;
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} else { /* OUT, 2 bytes */
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LINK_REG -> CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
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- (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0 );
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+ (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0 );
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while (!(LINK_REG -> CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE )) ;
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}
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@@ -363,7 +364,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
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pipe_wait_for_ready (num );
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LINK_REG -> D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk ;
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LINK_REG -> D0FIFOSEL = 0 ;
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- while (LINK_REG -> D0FIFOSEL_b .CURPIPE ) continue ; /* if CURPIPE bits changes, check written value */
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+ while (LINK_REG -> D0FIFOSEL_b .CURPIPE ) {} /* if CURPIPE bits changes, check written value */
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}
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} else {
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volatile uint16_t * ctr = get_pipectr (num );
@@ -447,10 +448,43 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
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/*------------------------------------------------------------------*/
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/* Host API
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*------------------------------------------------------------------*/
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+
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+ #if 0 // previously present in the rx driver before generalization
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+ static uint32_t disable_interrupt (void )
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+ {
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+ uint32_t pswi ;
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+ #if defined(__CCRX__ )
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+ pswi = get_psw () & 0x010000 ;
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+ clrpsw_i ();
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+ #else
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+ pswi = __builtin_rx_mvfc (0 ) & 0x010000 ;
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+ __builtin_rx_clrpsw ('I' );
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+ #endif
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+ return pswi ;
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+ }
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+
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+ static void enable_interrupt (uint32_t pswi )
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+ {
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+ #if defined(__CCRX__ )
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+ set_psw (get_psw () | pswi );
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+ #else
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+ __builtin_rx_mvtc (0 , __builtin_rx_mvfc (0 ) | pswi );
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+ #endif
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+ }
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+ #endif
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+
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bool hcd_init (uint8_t rhport )
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{
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(void )rhport ;
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+ #if 0 // previously present in the rx driver before generalization
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+ uint32_t pswi = disable_interrupt ();
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+ SYSTEM .PRCR .WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1 ;
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+ MSTP (USB0 ) = 0 ;
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+ SYSTEM .PRCR .WORD = SYSTEM_PRCR_PRKEY ;
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+ enable_interrupt (pswi );
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+ #endif
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+
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LINK_REG -> SYSCFG_b .SCKE = 1 ;
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while (!LINK_REG -> SYSCFG_b .SCKE ) ;
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LINK_REG -> SYSCFG_b .DPRPU = 0 ;
@@ -470,7 +504,7 @@ bool hcd_init(uint8_t rhport)
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LINK_REG -> DPUSR0R_FS_b .FIXPHY0 = 0u ; /* Transceiver Output fixed */
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/* Setup default control pipe */
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- LINK_REG -> DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk ;
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+ LINK_REG -> DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk ;
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LINK_REG -> DCPMAXP = 64 ;
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LINK_REG -> INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk ;
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LINK_REG -> INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk ;
@@ -515,8 +549,9 @@ void hcd_port_reset(uint8_t rhport)
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while (LINK_REG -> DCPCTR_b .PBUSY ) ;
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hcd_int_disable (rhport );
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LINK_REG -> DVSTCTR0_b .UACT = 0 ;
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- if (LINK_REG -> DCPCTR_b .SUREQ )
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+ if (LINK_REG -> DCPCTR_b .SUREQ ) {
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LINK_REG -> DCPCTR_b .SUREQCLR = 1 ;
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+ }
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hcd_int_enable (rhport );
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/* Reset should be asserted 10-20ms. */
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LINK_REG -> DVSTCTR0_b .USBRST = 1 ;
@@ -580,10 +615,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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LINK_REG -> DCPCTR = LINK_REG_PIPE_CTR_PID_NAK ;
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- _hcd .pipe [0 ].buf = NULL ;
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- _hcd .pipe [0 ].length = 8 ;
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+ _hcd .pipe [0 ].buf = NULL ;
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+ _hcd .pipe [0 ].length = 8 ;
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_hcd .pipe [0 ].remaining = 0 ;
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- _hcd .pipe [0 ].dev = dev_addr ;
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+ _hcd .pipe [0 ].dev = dev_addr ;
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while (LINK_REG -> DCPCTR_b .PBUSY ) ;
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LINK_REG -> DCPMAXP = (dev_addr << 12 ) | _hcd .ctl_mps [dev_addr ];
@@ -593,8 +628,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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LINK_REG -> DCPCFG_b .DIR = tu_edpt_dir (bmRequesttype ) ? 0 : 1 ;
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uint16_t const * p = (uint16_t const * )(uintptr_t )& setup_packet [0 ];
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- LINK_REG -> USBREQ = tu_htole16 (p [0 ]);
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- LINK_REG -> USBVAL = p [1 ];
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+ LINK_REG -> USBREQ = tu_htole16 (p [0 ]);
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+ LINK_REG -> USBVAL = p [1 ];
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LINK_REG -> USBINDX = p [2 ];
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LINK_REG -> USBLENG = p [3 ];
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@@ -717,12 +752,10 @@ void hcd_int_handler(uint8_t rhport)
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if (is1 & LINK_REG_INTSTS1_SACK_Msk ) {
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/* Set DATA1 in advance for the next transfer. */
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LINK_REG -> DCPCTR_b .SQSET = 1 ;
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- hcd_event_xfer_complete (
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- LINK_REG -> DCPMAXP_b .DEVSEL , tu_edpt_addr (0 , TUSB_DIR_OUT ), 8 , XFER_RESULT_SUCCESS , true);
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+ hcd_event_xfer_complete (LINK_REG -> DCPMAXP_b .DEVSEL , tu_edpt_addr (0 , TUSB_DIR_OUT ), 8 , XFER_RESULT_SUCCESS , true);
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}
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if (is1 & LINK_REG_INTSTS1_SIGN_Msk ) {
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- hcd_event_xfer_complete (
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- LINK_REG -> DCPMAXP_b .DEVSEL , tu_edpt_addr (0 , TUSB_DIR_OUT ), 8 , XFER_RESULT_FAILED , true);
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+ hcd_event_xfer_complete (LINK_REG -> DCPMAXP_b .DEVSEL , tu_edpt_addr (0 , TUSB_DIR_OUT ), 8 , XFER_RESULT_FAILED , true);
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}
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if (is1 & LINK_REG_INTSTS1_ATTCH_Msk ) {
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LINK_REG -> DVSTCTR0_b .UACT = 1 ;
@@ -732,8 +765,9 @@ void hcd_int_handler(uint8_t rhport)
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}
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if (is1 & LINK_REG_INTSTS1_DTCH_Msk ) {
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LINK_REG -> DVSTCTR0_b .UACT = 0 ;
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- if (LINK_REG -> DCPCTR_b .SUREQ )
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+ if (LINK_REG -> DCPCTR_b .SUREQ ) {
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LINK_REG -> DCPCTR_b .SUREQCLR = 1 ;
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+ }
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LINK_REG -> INTENB1 = (LINK_REG -> INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk ) | LINK_REG_INTSTS1_ATTCH_Msk ;
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hcd_event_device_remove (rhport , true);
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}
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