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Merge pull request hathach#2173 from hathach/imxrt-dcache-align
change dcache clean/invalidate return type to bool
2 parents d685ac6 + fd29fd9 commit 0b38941

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5 files changed

+31
-24
lines changed

5 files changed

+31
-24
lines changed

src/common/tusb_common.h

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -99,21 +99,19 @@ TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr);
9999
#define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var)))
100100

101101
// This is a backport of memset_s from c11
102-
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count)
103-
{
102+
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
104103
// TODO may check if desst and src is not NULL
105-
if (count > destsz) {
104+
if ( count > destsz ) {
106105
return -1;
107106
}
108107
memset(dest, ch, count);
109108
return 0;
110109
}
111110

112111
// This is a backport of memcpy_s from c11
113-
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count )
114-
{
112+
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
115113
// TODO may check if desst and src is not NULL
116-
if (count > destsz) {
114+
if ( count > destsz ) {
117115
return -1;
118116
}
119117
memcpy(dest, src, count);
@@ -169,6 +167,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { retur
169167
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
170168
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
171169

170+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; }
171+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; }
172+
172173
//------------- Mathematics -------------//
173174
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
174175

src/host/hcd.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,15 +110,15 @@ typedef struct
110110

111111
// clean/flush data cache: write cache -> memory.
112112
// Required before an DMA TX transfer to make sure data is in memory
113-
void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
113+
bool hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
114114

115115
// invalidate data cache: mark cache as invalid, next read will read from memory
116116
// Required BOTH before and after an DMA RX transfer
117-
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
117+
bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
118118

119119
// clean and invalidate data cache
120120
// Required before an DMA transfer where memory is both read/write by DMA
121-
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
121+
bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
122122

123123
//--------------------------------------------------------------------+
124124
// Controller API

src/portable/chipidea/ci_hs/ci_hs_imxrt.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -68,31 +68,34 @@ TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
6868
return !(0x20000000 <= addr && addr < 0x20100000);
6969
}
7070

71-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) {
71+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) {
7272
const uintptr_t addr32 = (uintptr_t) addr;
7373
if (imxrt_is_cache_mem(addr32)) {
74+
TU_ASSERT(tu_is_aligned32(addr32));
7475
SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
7576
}
77+
return true;
7678
}
7779

78-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
80+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
7981
const uintptr_t addr32 = (uintptr_t) addr;
8082
if (imxrt_is_cache_mem(addr32)) {
8183
// Invalidating does not push cached changes back to RAM so we need to be
8284
// *very* careful when we do it. If we're not aligned, then we risk resetting
8385
// values back to their RAM state.
84-
// if (addr32 % 32 != 0) {
85-
// TU_BREAKPOINT();
86-
// }
86+
TU_ASSERT(tu_is_aligned32(addr32));
8787
SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
8888
}
89+
return true;
8990
}
9091

91-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
92+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
9293
const uintptr_t addr32 = (uintptr_t) addr;
9394
if (imxrt_is_cache_mem(addr32)) {
95+
TU_ASSERT(tu_is_aligned32(addr32));
9496
SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
9597
}
98+
return true;
9699
}
97100

98101
#endif

src/portable/chipidea/ci_hs/hcd_ci_hs.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,16 +41,16 @@
4141
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
4242
#include "ci_hs_imxrt.h"
4343

44-
void hcd_dcache_clean(void const* addr, uint32_t data_size) {
45-
imxrt_dcache_clean(addr, data_size);
44+
bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
45+
return imxrt_dcache_clean(addr, data_size);
4646
}
4747

48-
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
49-
imxrt_dcache_invalidate(addr, data_size);
48+
bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
49+
return imxrt_dcache_invalidate(addr, data_size);
5050
}
5151

52-
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
53-
imxrt_dcache_clean_invalidate(addr, data_size);
52+
bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
53+
return imxrt_dcache_clean_invalidate(addr, data_size);
5454
}
5555

5656
#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)

src/portable/ehci/ehci.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -162,16 +162,19 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
162162
static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
163163
static inline ehci_link_t* list_next (ehci_link_t const *p_link);
164164

165-
TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
165+
TU_ATTR_WEAK bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
166166
(void) addr; (void) data_size;
167+
return true;
167168
}
168169

169-
TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
170+
TU_ATTR_WEAK bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
170171
(void) addr; (void) data_size;
172+
return true;
171173
}
172174

173-
TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
175+
TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
174176
(void) addr; (void) data_size;
177+
return true;
175178
}
176179

177180
//--------------------------------------------------------------------+

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