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style code for consistency with existing codebase
1 parent e0220c6 commit 60aae59

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7 files changed

+1077
-1073
lines changed

7 files changed

+1077
-1073
lines changed

hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c

Lines changed: 76 additions & 76 deletions
Original file line numberDiff line numberDiff line change
@@ -50,35 +50,35 @@ void usbfs_d0fifo_handler(void);
5050
void usbfs_d1fifo_handler(void);
5151

5252
BSP_DONT_REMOVE const
53-
fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
54-
[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
55-
[1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
56-
[2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
57-
[3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
53+
fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
54+
[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
55+
[1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
56+
[2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
57+
[3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
5858
};
5959
const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
60-
[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */
61-
[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
62-
[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
63-
[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */
60+
[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */
61+
[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
62+
[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
63+
[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */
6464
};
6565

6666
const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
67-
{.pin = BSP_IO_PORT_04_PIN_07,
68-
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
69-
{.pin = BSP_IO_PORT_05_PIN_00,
70-
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
71-
{.pin = BSP_IO_PORT_05_PIN_01,
72-
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
73-
{.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
74-
{.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
75-
{.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
76-
{.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
77-
{.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
67+
{.pin = BSP_IO_PORT_04_PIN_07,
68+
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
69+
{.pin = BSP_IO_PORT_05_PIN_00,
70+
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
71+
{.pin = BSP_IO_PORT_05_PIN_01,
72+
.pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
73+
{.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
74+
{.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
75+
{.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
76+
{.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
77+
{.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
7878

7979
const ioport_cfg_t g_bsp_pin_cfg = {
80-
.number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
81-
.p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
80+
.number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
81+
.p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
8282
};
8383
ioport_instance_ctrl_t g_ioport_ctrl;
8484
const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
@@ -88,78 +88,78 @@ const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_i
8888
//--------------------------------------------------------------------+
8989
void usbfs_interrupt_handler(void)
9090
{
91-
IRQn_Type irq = R_FSP_CurrentIrqGet();
92-
R_BSP_IrqStatusClear(irq);
91+
IRQn_Type irq = R_FSP_CurrentIrqGet();
92+
R_BSP_IrqStatusClear(irq);
9393

9494
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
95-
tuh_int_handler(0);
95+
tuh_int_handler(0);
9696
#endif
9797

9898
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
99-
tud_int_handler(0);
99+
tud_int_handler(0);
100100
#endif
101101
}
102102
void usbfs_resume_handler(void)
103103
{
104-
IRQn_Type irq = R_FSP_CurrentIrqGet();
105-
R_BSP_IrqStatusClear(irq);
104+
IRQn_Type irq = R_FSP_CurrentIrqGet();
105+
R_BSP_IrqStatusClear(irq);
106106

107107
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
108-
tuh_int_handler(0);
108+
tuh_int_handler(0);
109109
#endif
110110

111111
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
112-
tud_int_handler(0);
112+
tud_int_handler(0);
113113
#endif
114114
}
115115
void usbfs_d0fifo_handler(void)
116116
{
117-
IRQn_Type irq = R_FSP_CurrentIrqGet();
118-
R_BSP_IrqStatusClear(irq);
117+
IRQn_Type irq = R_FSP_CurrentIrqGet();
118+
R_BSP_IrqStatusClear(irq);
119119

120120
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
121-
tuh_int_handler(0);
121+
tuh_int_handler(0);
122122
#endif
123123

124124
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
125-
tud_int_handler(0);
125+
tud_int_handler(0);
126126
#endif
127127
}
128128
void usbfs_d1fifo_handler(void)
129129
{
130-
IRQn_Type irq = R_FSP_CurrentIrqGet();
131-
R_BSP_IrqStatusClear(irq);
130+
IRQn_Type irq = R_FSP_CurrentIrqGet();
131+
R_BSP_IrqStatusClear(irq);
132132

133133
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
134-
tuh_int_handler(0);
134+
tuh_int_handler(0);
135135
#endif
136136

137137
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
138-
tud_int_handler(0);
138+
tud_int_handler(0);
139139
#endif
140140
}
141141

142142
void board_init(void)
143143
{
144-
/* Configure pins. */
145-
R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
144+
/* Configure pins. */
145+
R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
146146

147-
/* Enable USB_BASE */
148-
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
149-
R_MSTP->MSTPCRB &= ~(1U << 11U);
150-
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
147+
/* Enable USB_BASE */
148+
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
149+
R_MSTP->MSTPCRB &= ~(1U << 11U);
150+
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
151151

152152
#if CFG_TUSB_OS == OPT_OS_FREERTOS
153-
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
154-
NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
155-
NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
156-
NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
157-
NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
153+
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
154+
NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
155+
NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
156+
NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
157+
NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
158158
#endif
159159

160160
#if CFG_TUSB_OS == OPT_OS_NONE
161-
/* Init systick */
162-
SysTick_Config(SystemCoreClock / 1000);
161+
/* Init systick */
162+
SysTick_Config(SystemCoreClock / 1000);
163163
#endif
164164
}
165165

@@ -169,66 +169,66 @@ void board_init(void)
169169

170170
void board_led_write(bool state)
171171
{
172-
R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
173-
R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
174-
R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
172+
R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
173+
R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
174+
R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
175175
}
176176

177177
uint32_t board_button_read(void)
178178
{
179-
bsp_io_level_t lvl;
180-
R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
181-
return lvl;
179+
bsp_io_level_t lvl;
180+
R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
181+
return lvl;
182182
}
183183

184184
int board_uart_read(uint8_t *buf, int len)
185185
{
186-
(void) buf;
187-
(void) len;
188-
return 0;
186+
(void) buf;
187+
(void) len;
188+
return 0;
189189
}
190190

191191
int board_uart_write(void const *buf, int len)
192192
{
193-
(void) buf;
194-
(void) len;
195-
return 0;
193+
(void) buf;
194+
(void) len;
195+
return 0;
196196
}
197197

198198
#if CFG_TUSB_OS == OPT_OS_NONE
199199
volatile uint32_t system_ticks = 0;
200200
void SysTick_Handler(void)
201201
{
202-
system_ticks++;
202+
system_ticks++;
203203
}
204204

205205
uint32_t board_millis(void)
206206
{
207-
return system_ticks;
207+
return system_ticks;
208208
}
209209
#else
210210
#endif
211211

212212
int close(int fd)
213213
{
214-
(void) fd;
215-
return -1;
214+
(void) fd;
215+
return -1;
216216
}
217217
int fstat(int fd, void *pstat)
218218
{
219-
(void) fd;
220-
(void) pstat;
221-
return 0;
219+
(void) fd;
220+
(void) pstat;
221+
return 0;
222222
}
223223
off_t lseek(int fd, off_t pos, int whence)
224224
{
225-
(void) fd;
226-
(void) pos;
227-
(void) whence;
228-
return 0;
225+
(void) fd;
226+
(void) pos;
227+
(void) whence;
228+
return 0;
229229
}
230230
int isatty(int fd)
231231
{
232-
(void) fd;
233-
return 1;
232+
(void) fd;
233+
return 1;
234234
}

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