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Merge pull request hathach#1843 from HiFiPhile/ip3511
ip3511 : Fix IAR build.
2 parents 83cc71f + 57de601 commit 8775d55

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-17
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ typedef union TU_ATTR_PACKED
139139
uint32_t stall : 1 ;
140140
uint32_t disable : 1 ;
141141
uint32_t active : 1 ;
142-
};
142+
} cmd_sts;
143143
}ep_cmd_sts_t;
144144

145145
TU_VERIFY_STATIC( sizeof(ep_cmd_sts_t) == 4, "size is not correct" );
@@ -329,7 +329,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
329329

330330
// TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around
331331
uint8_t const ep_id = ep_addr2id(ep_addr);
332-
_dcd.ep[ep_id][0].stall = 1;
332+
_dcd.ep[ep_id][0].cmd_sts.stall = 1;
333333
}
334334

335335
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
@@ -338,9 +338,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
338338

339339
uint8_t const ep_id = ep_addr2id(ep_addr);
340340

341-
_dcd.ep[ep_id][0].stall = 0;
342-
_dcd.ep[ep_id][0].toggle_reset = 1;
343-
_dcd.ep[ep_id][0].toggle_mode = 0;
341+
_dcd.ep[ep_id][0].cmd_sts.stall = 0;
342+
_dcd.ep[ep_id][0].cmd_sts.toggle_reset = 1;
343+
_dcd.ep[ep_id][0].cmd_sts.toggle_mode = 0;
344344
}
345345

346346
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
@@ -349,10 +349,10 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
349349
uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress);
350350

351351
// Check if endpoint is available
352-
TU_ASSERT( _dcd.ep[ep_id][0].disable && _dcd.ep[ep_id][1].disable );
352+
TU_ASSERT( _dcd.ep[ep_id][0].cmd_sts.disable && _dcd.ep[ep_id][1].cmd_sts.disable );
353353

354354
edpt_reset(rhport, ep_id);
355-
_dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
355+
_dcd.ep[ep_id][0].cmd_sts.is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
356356

357357
// Enable EP interrupt
358358
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
@@ -365,8 +365,8 @@ void dcd_edpt_close_all (uint8_t rhport)
365365
{
366366
for (uint8_t ep_id = 0; ep_id < 2*_dcd_controller[rhport].ep_pairs; ++ep_id)
367367
{
368-
_dcd.ep[ep_id][0].active = _dcd.ep[ep_id][0].active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual)
369-
_dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1;
368+
_dcd.ep[ep_id][0].cmd_sts.active = _dcd.ep[ep_id][0].cmd_sts.active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual)
369+
_dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
370370
}
371371
}
372372

@@ -375,8 +375,8 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
375375
(void) rhport;
376376

377377
uint8_t ep_id = ep_addr2id(ep_addr);
378-
_dcd.ep[ep_id][0].active = _dcd.ep[ep_id][0].active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual)
379-
_dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1;
378+
_dcd.ep[ep_id][0].cmd_sts.active = _dcd.ep[ep_id][0].cmd_sts.active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual)
379+
_dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
380380
}
381381

382382
static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes)
@@ -385,7 +385,7 @@ static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset,
385385

386386
if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL )
387387
{
388-
nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX);
388+
nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].cmd_sts.is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX);
389389
_dcd.ep[ep_id][0].buffer_fs.offset = buf_offset;
390390
_dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes;
391391
}else
@@ -397,7 +397,7 @@ static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset,
397397

398398
_dcd.dma[ep_id].nbytes = nbytes;
399399

400-
_dcd.ep[ep_id][0].active = 1;
400+
_dcd.ep[ep_id][0].cmd_sts.active = 1;
401401
}
402402

403403
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
@@ -431,7 +431,7 @@ static void bus_reset(uint8_t rhport)
431431
// disable all endpoints as specified by LPC55S69 UM Table 778
432432
for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++)
433433
{
434-
_dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1;
434+
_dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
435435
}
436436

437437
dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
@@ -459,7 +459,7 @@ static void process_xfer_isr(uint8_t rhport, uint32_t int_status)
459459
if ( ep_id == 0 || ep_id == 1)
460460
{
461461
// For control endpoint, we need to manually clear Active bit
462-
ep_cs->active = 0;
462+
ep_cs->cmd_sts.active = 0;
463463
}
464464

465465
uint16_t buf_offset;
@@ -556,8 +556,8 @@ void dcd_int_handler(uint8_t rhport)
556556
if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
557557
{
558558
// Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints
559-
_dcd.ep[0][0].active = _dcd.ep[1][0].active = 0;
560-
_dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 0;
559+
_dcd.ep[0][0].cmd_sts.active = _dcd.ep[1][0].cmd_sts.active = 0;
560+
_dcd.ep[0][0].cmd_sts.stall = _dcd.ep[1][0].cmd_sts.stall = 0;
561561

562562
dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK;
563563

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