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| 1 | +/* |
| 2 | + * The MIT License (MIT) |
| 3 | + * |
| 4 | + * Copyright (c) 2022 Nathaniel Brough |
| 5 | + * |
| 6 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | + * of this software and associated documentation files (the "Software"), to deal |
| 8 | + * in the Software without restriction, including without limitation the rights |
| 9 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | + * copies of the Software, and to permit persons to whom the Software is |
| 11 | + * furnished to do so, subject to the following conditions: |
| 12 | + * |
| 13 | + * The above copyright notice and this permission notice shall be included in |
| 14 | + * all copies or substantial portions of the Software. |
| 15 | + * |
| 16 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | + * THE SOFTWARE. |
| 23 | + * |
| 24 | + */ |
| 25 | + |
| 26 | +#ifndef _TUSB_CONFIG_H_ |
| 27 | +#define _TUSB_CONFIG_H_ |
| 28 | + |
| 29 | +#ifdef __cplusplus |
| 30 | + extern "C" { |
| 31 | +#endif |
| 32 | + |
| 33 | +//--------------------------------------------------------------------+ |
| 34 | +// Board Specific Configuration |
| 35 | +//--------------------------------------------------------------------+ |
| 36 | + |
| 37 | +// RHPort number used for device can be defined by board.mk, default to port 0 |
| 38 | +#ifndef BOARD_TUD_RHPORT |
| 39 | +#define BOARD_TUD_RHPORT 0 |
| 40 | +#endif |
| 41 | + |
| 42 | +// RHPort max operational speed can defined by board.mk |
| 43 | +#ifndef BOARD_TUD_MAX_SPEED |
| 44 | +#define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED |
| 45 | +#endif |
| 46 | + |
| 47 | +//-------------------------------------------------------------------- |
| 48 | +// Common Configuration |
| 49 | +//-------------------------------------------------------------------- |
| 50 | + |
| 51 | +// defined by compiler flags for flexibility |
| 52 | +#ifndef CFG_TUSB_MCU |
| 53 | +#error CFG_TUSB_MCU must be defined |
| 54 | +#endif |
| 55 | + |
| 56 | +#ifndef CFG_TUSB_OS |
| 57 | +#define CFG_TUSB_OS OPT_OS_NONE |
| 58 | +#endif |
| 59 | + |
| 60 | +#ifndef CFG_TUSB_DEBUG |
| 61 | +#define CFG_TUSB_DEBUG 0 |
| 62 | +#endif |
| 63 | + |
| 64 | +// Enable Device stack |
| 65 | +#define CFG_TUD_ENABLED 1 |
| 66 | + |
| 67 | +// Default is max speed that hardware controller could support with on-chip PHY |
| 68 | +#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED |
| 69 | + |
| 70 | +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. |
| 71 | + * Tinyusb use follows macros to declare transferring memory so that they can be put |
| 72 | + * into those specific section. |
| 73 | + * e.g |
| 74 | + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) |
| 75 | + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) |
| 76 | + */ |
| 77 | +#ifndef CFG_TUSB_MEM_SECTION |
| 78 | +#define CFG_TUSB_MEM_SECTION |
| 79 | +#endif |
| 80 | + |
| 81 | +#ifndef CFG_TUSB_MEM_ALIGN |
| 82 | +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) |
| 83 | +#endif |
| 84 | + |
| 85 | +//-------------------------------------------------------------------- |
| 86 | +// DEVICE CONFIGURATION |
| 87 | +//-------------------------------------------------------------------- |
| 88 | + |
| 89 | +#ifndef CFG_TUD_ENDPOINT0_SIZE |
| 90 | +#define CFG_TUD_ENDPOINT0_SIZE 64 |
| 91 | +#endif |
| 92 | + |
| 93 | +//------------- CLASS -------------// |
| 94 | +#define CFG_TUD_CDC 0 |
| 95 | +#define CFG_TUD_MSC 1 |
| 96 | +#define CFG_TUD_HID 0 |
| 97 | +#define CFG_TUD_MIDI 0 |
| 98 | +#define CFG_TUD_VENDOR 0 |
| 99 | + |
| 100 | +// CDC FIFO size of TX and RX |
| 101 | +#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) |
| 102 | +#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) |
| 103 | + |
| 104 | +// CDC Endpoint transfer buffer size, more is faster |
| 105 | +#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) |
| 106 | + |
| 107 | +// MSC Buffer size of Device Mass storage |
| 108 | +#define CFG_TUD_MSC_EP_BUFSIZE 512 |
| 109 | + |
| 110 | +#ifdef __cplusplus |
| 111 | + } |
| 112 | +#endif |
| 113 | + |
| 114 | +#endif /* _TUSB_CONFIG_H_ */ |
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