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hathachhathach
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inital support for usb typec and pd example
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16 files changed

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‎examples/typec/power_delivery/CMakeLists.txt

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cmake_minimum_required(VERSION 3.17)
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include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
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5+
# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
6+
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
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project(${PROJECT} C CXX ASM)
9+
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# Checks this example is valid for the family and initializes the project
11+
family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
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# Espressif has its own cmake build system
14+
if(FAMILY STREQUAL "espressif")
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return()
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endif()
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add_executable(${PROJECT})
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# Example source
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target_sources(${PROJECT} PUBLIC
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${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
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)
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# Example include
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target_include_directories(${PROJECT} PUBLIC
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${CMAKE_CURRENT_SOURCE_DIR}/src
28+
)
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30+
# Configure compilation flags and libraries for the example... see the corresponding function
31+
# in hw/bsp/FAMILY/family.cmake for details.
32+
family_configure_device_example(${PROJECT})

‎examples/typec/power_delivery/Makefile

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include ../../make.mk
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INC += \
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src \
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$(TOP)/hw \
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# Example source
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EXAMPLE_SOURCE += $(wildcard src/*.c)
9+
SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
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include ../../rules.mk

‎examples/typec/power_delivery/only.txt

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mcu:STM32G4

‎examples/typec/power_delivery/src/main.c

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "bsp/board.h"
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#include "tusb.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF PROTOTYPES
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//--------------------------------------------------------------------+
36+
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/* Blink pattern
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* - 250 ms : button is not pressed
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* - 1000 ms : button is pressed (and hold)
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*/
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enum {
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BLINK_PRESSED = 250,
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BLINK_UNPRESSED = 1000
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};
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static uint32_t blink_interval_ms = BLINK_UNPRESSED;
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void led_blinking_task(void);
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#define HELLO_STR "Hello from TinyUSB\r\n"
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int main(void)
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{
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board_init();
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board_led_write(true);
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tuc_init(0, TYPEC_PORT_SNK);
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uint32_t start_ms = 0;
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bool led_state = false;
61+
62+
while (1) {
63+
led_blinking_task();
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// tuc_task();
66+
}
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}
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#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
70+
void app_main(void)
71+
{
72+
main();
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}
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#endif
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//--------------------------------------------------------------------+
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// BLINKING TASK
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//--------------------------------------------------------------------+
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void led_blinking_task(void)
80+
{
81+
static uint32_t start_ms = 0;
82+
static bool led_state = false;
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84+
// Blink every interval ms
85+
if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
86+
start_ms += blink_interval_ms;
87+
88+
board_led_write(led_state);
89+
led_state = 1 - led_state; // toggle
90+
}

‎examples/typec/power_delivery/src/tusb_config.h

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
7+
* of this software and associated documentation files (the "Software"), to deal
8+
* in the Software without restriction, including without limitation the rights
9+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10+
* copies of the Software, and to permit persons to whom the Software is
11+
* furnished to do so, subject to the following conditions:
12+
*
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* The above copyright notice and this permission notice shall be included in
14+
* all copies or substantial portions of the Software.
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*
16+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22+
* THE SOFTWARE.
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*
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*/
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#ifndef _TUSB_CONFIG_H_
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#define _TUSB_CONFIG_H_
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#ifdef __cplusplus
30+
extern "C" {
31+
#endif
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33+
// special example that doesn't enable device or host stack
34+
// This can cause some TinyUSB API missing, this define hack to allow us to fill those API
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// to pass the compilation process
36+
#define tud_int_handler(x)
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//--------------------------------------------------------------------
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// COMMON CONFIGURATION
40+
//--------------------------------------------------------------------
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42+
// defined by compiler flags for flexibility
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#ifndef CFG_TUSB_MCU
44+
#error CFG_TUSB_MCU must be defined
45+
#endif
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#ifndef CFG_TUSB_OS
48+
#define CFG_TUSB_OS OPT_OS_NONE
49+
#endif
50+
51+
#define CFG_TUD_ENABLED 0
52+
#define CFG_TUH_ENABLED 0
53+
54+
// Enable TYPEC stack
55+
#define CFG_TUC_ENABLED 1
56+
57+
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
58+
// #define CFG_TUSB_DEBUG 0
59+
60+
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
61+
* Tinyusb use follows macros to declare transferring memory so that they can be put
62+
* into those specific section.
63+
* e.g
64+
* - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
65+
* - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
66+
*/
67+
#ifndef CFG_TUSB_MEM_SECTION
68+
#define CFG_TUSB_MEM_SECTION
69+
#endif
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#ifndef CFG_TUSB_MEM_ALIGN
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#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4)))
73+
#endif
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#ifdef __cplusplus
76+
}
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#endif
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#endif /* _TUSB_CONFIG_H_ */

‎hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h

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5858
// RCC Clock
5959
//--------------------------------------------------------------------+
6060

61-
// CPU Frequency (Core Clock) is 150MHz
61+
// CPU Frequency (Core Clock) is 170 MHz
6262
static inline void board_clock_init(void)
6363
{
6464
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -74,9 +74,9 @@ static inline void board_clock_init(void)
7474
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
7575
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
7676
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
77-
RCC_OscInitStruct.PLL.PLLN = 75;
78-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
79-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
77+
RCC_OscInitStruct.PLL.PLLN = 85;
78+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10;
79+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
8080
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
8181
HAL_RCC_OscConfig(&RCC_OscInitStruct);
8282

‎hw/bsp/stm32g4/family.c

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@@ -30,132 +30,6 @@
3030
#include "bsp/board.h"
3131
#include "board.h"
3232

33-
34-
//--------------------------------------------------------------------+
35-
// USB PD
36-
//--------------------------------------------------------------------+
37-
38-
void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) {
39-
(void) port_num;
40-
41-
// Initialization phase: CFG1
42-
UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
43-
(0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
44-
( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
45-
UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
46-
47-
// General programming sequence (with UCPD configured then enabled)
48-
if (port_type == TUSB_TYPEC_PORT_SNK) {
49-
// Enable both CC Phy
50-
UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
51-
52-
// Read Voltage State on CC1 & CC2 fore initial state
53-
uint32_t vstate_cc[2];
54-
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
55-
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
56-
57-
TU_LOG1_INT(vstate_cc[0]);
58-
TU_LOG1_INT(vstate_cc[1]);
59-
60-
// Enable CC1 & CC2 Interrupt
61-
UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
62-
}
63-
64-
// Enable interrupt
65-
NVIC_EnableIRQ(UCPD1_IRQn);
66-
}
67-
68-
uint8_t pd_rx_buf[262];
69-
uint32_t pd_rx_count = 0;
70-
71-
void UCPD1_IRQHandler(void) {
72-
uint32_t sr = UCPD1->SR;
73-
sr &= UCPD1->IMR;
74-
75-
// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
76-
77-
if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
78-
uint32_t vstate_cc[2];
79-
vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
80-
vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
81-
82-
TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
83-
84-
uint32_t cr = UCPD1->CR;
85-
86-
// TODO only support SNK for now, required highest voltage for now
87-
if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
88-
TU_LOG1("Attach CC1\n");
89-
cr &= ~UCPD_CR_PHYCCSEL;
90-
cr |= UCPD_CR_PHYRXEN;
91-
} else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
92-
TU_LOG1("Attach CC2\n");
93-
cr |= UCPD_CR_PHYCCSEL;
94-
cr |= UCPD_CR_PHYRXEN;
95-
} else {
96-
TU_LOG1("Detach\n");
97-
cr &= ~UCPD_CR_PHYRXEN;
98-
}
99-
100-
if (cr & UCPD_CR_PHYRXEN) {
101-
// Enable Interrupt
102-
UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
103-
UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
104-
UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
105-
}
106-
107-
// Enable PD RX
108-
UCPD1->CR = cr;
109-
110-
// ack
111-
UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
112-
}
113-
114-
//------------- Receive -------------//
115-
if (sr & UCPD_SR_RXORDDET) {
116-
// SOP: Start of Packet.
117-
// uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
118-
119-
// reset count when received SOP
120-
pd_rx_count = 0;
121-
122-
// ack
123-
UCPD1->ICR = UCPD_ICR_RXORDDETCF;
124-
}
125-
126-
if (sr & UCPD_SR_RXNE) {
127-
// TODO DMA later
128-
do {
129-
pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
130-
} while (UCPD1->SR & UCPD_SR_RXNE);
131-
}
132-
133-
if (sr & UCPD_SR_RXMSGEND) {
134-
// End of message
135-
uint32_t payload_size = UCPD1->RX_PAYSZ;
136-
137-
// ack
138-
UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
139-
}
140-
141-
if (sr & UCPD_SR_RXOVR) {
142-
TU_LOG1("RXOVR\n");
143-
TU_LOG1_HEX(pd_rx_count);
144-
// ack
145-
UCPD1->ICR = UCPD_ICR_RXOVRCF;
146-
}
147-
148-
// if (sr & UCPD_SR_RXNE) {
149-
// uint8_t data = UCPD1->RXDR;
150-
// pd_rx_buf[pd_rx_count++] = data;
151-
// TU_LOG1_HEX(data);
152-
// }
153-
154-
// else {
155-
// TU_LOG_LOCATION();
156-
// }
157-
}
158-
15933
//--------------------------------------------------------------------+
16034
// Forward USB interrupt events to TinyUSB IRQ Handler
16135
//--------------------------------------------------------------------+
@@ -174,6 +48,11 @@ void USBWakeUp_IRQHandler(void)
17448
tud_int_handler(0);
17549
}
17650

51+
// USB PD
52+
void UCPD1_IRQHandler(void) {
53+
tuc_int_handler(0);
54+
}
55+
17756
//--------------------------------------------------------------------+
17857
// MACRO TYPEDEF CONSTANT ENUM
17958
//--------------------------------------------------------------------+
@@ -274,8 +153,6 @@ void board_init(void)
274153
// Default CC1/CC2 is PB4/PB6
275154
// PB4 ------> UCPD1_CC2
276155
// PB6 ------> UCPD1_CC1
277-
278-
usbpd_init(0, TUSB_TYPEC_PORT_SNK);
279156
#endif
280157

281158
}

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