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fix usb clock for dpow1
1 parent c3bde52 commit ba3d71b

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1 file changed

+24
-26
lines changed
  • hw/bsp/stm32g4/boards/b_g474e_dpow1

1 file changed

+24
-26
lines changed

hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h

Lines changed: 24 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -61,44 +61,38 @@ static inline void board_clock_init(void)
6161
{
6262
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
6363
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
64-
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
6564

6665
// Configure the main internal regulator output voltage
6766
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
6867

69-
// Initializes the CPU, AHB and APB buses clocks
70-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
71-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
72-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
73-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
74-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
75-
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
76-
RCC_OscInitStruct.PLL.PLLN = 50;
77-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
78-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
79-
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
68+
/* Activate PLL with HSI as source */
69+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
70+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
71+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
72+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
73+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
74+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
75+
RCC_OscInitStruct.PLL.PLLN = 85;
76+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10;
77+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
78+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
8079
HAL_RCC_OscConfig(&RCC_OscInitStruct);
8180

8281
// Initializes the CPU, AHB and APB buses clocks
83-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
82+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
83+
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
8484
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8585
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8686
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
8787
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8888
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
8989

90-
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
91-
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
92-
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
93-
94-
#if 0 // TODO need to check if USB clock is enabled
95-
/* Enable HSI48 */
96-
memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
97-
98-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
99-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
100-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
101-
HAL_RCC_OscConfig(&RCC_OscInitStruct);
90+
//------------- HSI48 and CRS for USB -------------//
91+
RCC_OscInitTypeDef osc_hsi48 = {0};
92+
osc_hsi48.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
93+
osc_hsi48.HSI48State = RCC_HSI48_ON;
94+
osc_hsi48.PLL.PLLState = RCC_PLL_NONE;
95+
HAL_RCC_OscConfig(&osc_hsi48);
10296

10397
/*Enable CRS Clock*/
10498
RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
@@ -119,7 +113,11 @@ static inline void board_clock_init(void)
119113

120114
/* Start automatic synchronization */
121115
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
122-
#endif
116+
117+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
118+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
119+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
120+
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
123121
}
124122

125123
static inline void board_vbus_sense_init(void)

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