Skip to content

Commit c9b0fbc

Browse files
hathachhathach
authored
Merge pull request hathach#1354 from hathach/mcu-specific
Mcu specific
2 parents 6dd4d50 + 2fe3a92 commit c9b0fbc

File tree

10 files changed

+148
-127
lines changed

10 files changed

+148
-127
lines changed

‎src/common/tusb_mcu_attr.h renamed to ‎src/common/tusb_mcu.h

Lines changed: 112 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,22 @@
2424
* This file is part of the TinyUSB stack.
2525
*/
2626

27-
#ifndef TUSB_MCU_ATTR_H_
28-
#define TUSB_MCU_ATTR_H_
27+
#ifndef TUSB_MCU_H_
28+
#define TUSB_MCU_H_
29+
30+
//--------------------------------------------------------------------+
31+
// Port Specific
32+
// TUP stand for TinyUSB Port (can be renamed)
33+
//--------------------------------------------------------------------+
34+
35+
//------------- Unaligned Memory Access -------------//
36+
37+
// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
38+
#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
39+
#define TUP_ARCH_STRICT_ALIGN 0
40+
#else
41+
#define TUP_ARCH_STRICT_ALIGN 1
42+
#endif
2943

3044
/* USB Controller Attributes for Device, Host or MCU (both)
3145
* - ENDPOINT_MAX: max (logical) number of endpoint
@@ -37,208 +51,232 @@
3751

3852
//------------- NXP -------------//
3953
#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
40-
#define DCD_ATTR_ENDPOINT_MAX 5
54+
#define TUP_DCD_ENDPOINT_MAX 5
4155

4256
#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
43-
#define DCD_ATTR_ENDPOINT_MAX 16
44-
#define HCD_ATTR_OHCI
57+
#define TUP_DCD_ENDPOINT_MAX 16
58+
#define TUP_USBIP_OHCI
4559

4660
#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
4761
// TODO USB0 has 6, USB1 has 4
48-
#define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
49-
#define DCD_ATTR_ENDPOINT_MAX 6
50-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS
62+
#define TUP_USBIP_CHIPIDEA_HS
63+
#define TUP_USBIP_EHCI
64+
65+
#define TUP_DCD_ENDPOINT_MAX 6
66+
#define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS
5167

52-
#define HCD_ATTR_EHCI
5368

5469
#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
55-
#define DCD_ATTR_ENDPOINT_MAX 5
70+
#define TUP_DCD_ENDPOINT_MAX 5
5671

5772
#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
5873
// TODO USB0 has 5, USB1 has 6
59-
#define DCD_ATTR_ENDPOINT_MAX 6
74+
#define TUP_DCD_ENDPOINT_MAX 6
6075

6176
#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
6277
// TODO USB0 has 5, USB1 has 6
63-
#define DCD_ATTR_ENDPOINT_MAX 6
78+
#define TUP_DCD_ENDPOINT_MAX 6
6479

6580
#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
66-
#define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
67-
#define DCD_ATTR_ENDPOINT_MAX 8
68-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS
81+
#define TUP_USBIP_CHIPIDEA_HS
82+
#define TUP_USBIP_EHCI
83+
84+
#define TUP_DCD_ENDPOINT_MAX 8
85+
#define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS
6986

70-
#define HCD_ATTR_EHCI
7187

7288
#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
73-
#define DCD_ATTR_ENDPOINT_MAX 16
89+
#define TUP_DCD_ENDPOINT_MAX 16
7490

7591
#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
76-
#define DCD_ATTR_ENDPOINT_MAX 16
92+
#define TUP_DCD_ENDPOINT_MAX 16
7793

7894
//------------- Nordic -------------//
7995
#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
8096
// 8 CBI + 1 ISO
81-
#define DCD_ATTR_ENDPOINT_MAX 9
97+
#define TUP_DCD_ENDPOINT_MAX 9
8298

8399
//------------- Microchip -------------//
84100
#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
85101
TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
86-
#define DCD_ATTR_ENDPOINT_MAX 8
102+
#define TUP_DCD_ENDPOINT_MAX 8
87103

88104
#elif TU_CHECK_MCU(OPT_MCU_SAMG)
89-
#define DCD_ATTR_ENDPOINT_MAX 6
90-
#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
105+
#define TUP_DCD_ENDPOINT_MAX 6
106+
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
91107

92108
#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
93-
#define DCD_ATTR_ENDPOINT_MAX 10
94-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
95-
#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
109+
#define TUP_DCD_ENDPOINT_MAX 10
110+
#define TUP_RHPORT_HIGHSPEED 0x01
111+
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
96112

97113
#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
98-
#define DCD_ATTR_ENDPOINT_MAX 8
99-
#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
114+
#define TUP_DCD_ENDPOINT_MAX 8
115+
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
100116

101117
//------------- ST -------------//
102118
#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
103-
#define DCD_ATTR_ENDPOINT_MAX 8
119+
#define TUP_DCD_ENDPOINT_MAX 8
104120

105121
#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
106122
#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
107123
defined (STM32F107xB) || defined (STM32F107xC)
108-
#define DCD_ATTR_ENDPOINT_MAX 4
109-
#define DCD_ATTR_DWC2_STM32
124+
#define TUP_USBIP_DWC2
125+
#define TUP_USBIP_DWC2_STM32
126+
127+
#define TUP_DCD_ENDPOINT_MAX 4
110128
#else
111-
#define DCD_ATTR_ENDPOINT_MAX 8
129+
#define TUP_DCD_ENDPOINT_MAX 8
112130
#endif
113131

114132
#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
133+
#define TUP_USBIP_DWC2
134+
#define TUP_USBIP_DWC2_STM32
135+
115136
// FS has 4 ep, HS has 5 ep
116-
#define DCD_ATTR_ENDPOINT_MAX 6
117-
#define DCD_ATTR_DWC2_STM32
137+
#define TUP_DCD_ENDPOINT_MAX 6
118138

119139
#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
120-
#define DCD_ATTR_ENDPOINT_MAX 8
140+
#define TUP_DCD_ENDPOINT_MAX 8
121141

122142
#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
143+
#define TUP_USBIP_DWC2
144+
#define TUP_USBIP_DWC2_STM32
145+
123146
// For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
124-
#define DCD_ATTR_ENDPOINT_MAX 6
125-
#define DCD_ATTR_DWC2_STM32
147+
#define TUP_DCD_ENDPOINT_MAX 6
126148

127149
#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
150+
#define TUP_USBIP_DWC2
151+
#define TUP_USBIP_DWC2_STM32
152+
128153
// FS has 6, HS has 9
129-
#define DCD_ATTR_ENDPOINT_MAX 9
130-
#define DCD_ATTR_DWC2_STM32
154+
#define TUP_DCD_ENDPOINT_MAX 9
155+
156+
// MCU with on-chip HS Phy
157+
#if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
158+
#define TUP_RHPORT_HIGHSPEED 0x02 // Port 0: FS, Port 1: HS
159+
#endif
131160

132161
#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
133-
#define DCD_ATTR_ENDPOINT_MAX 9
134-
#define DCD_ATTR_DWC2_STM32
162+
#define TUP_USBIP_DWC2
163+
#define TUP_USBIP_DWC2_STM32
164+
165+
#define TUP_DCD_ENDPOINT_MAX 9
135166

136167
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
137-
#define DCD_ATTR_ENDPOINT_MAX 8
168+
#define TUP_DCD_ENDPOINT_MAX 8
138169

139170
#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
140-
#define DCD_ATTR_ENDPOINT_MAX 8
171+
#define TUP_DCD_ENDPOINT_MAX 8
141172

142173
#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
143174
#if defined (STM32L475xx) || defined (STM32L476xx) || \
144175
defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
145176
defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
146177
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
147178
defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
148-
#define DCD_ATTR_ENDPOINT_MAX 6
149-
#define DCD_ATTR_DWC2_STM32
179+
#define TUP_USBIP_DWC2
180+
#define TUP_USBIP_DWC2_STM32
181+
182+
#define TUP_DCD_ENDPOINT_MAX 6
150183
#else
151-
#define DCD_ATTR_ENDPOINT_MAX 8
184+
#define TUP_DCD_ENDPOINT_MAX 8
152185
#endif
153186

154187
//------------- Sony -------------//
155188
#elif TU_CHECK_MCU(OPT_MCU_CXD56)
156-
#define DCD_ATTR_ENDPOINT_MAX 7
157-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
158-
#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
189+
#define TUP_DCD_ENDPOINT_MAX 7
190+
#define TUP_RHPORT_HIGHSPEED 0x01
191+
#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
159192

160193
//------------- TI -------------//
161194
#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
162-
#define DCD_ATTR_ENDPOINT_MAX 8
195+
#define TUP_DCD_ENDPOINT_MAX 8
163196

164197
#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
165-
#define DCD_ATTR_ENDPOINT_MAX 8
198+
#define TUP_DCD_ENDPOINT_MAX 8
166199

167200
//------------- ValentyUSB -------------//
168201
#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
169-
#define DCD_ATTR_ENDPOINT_MAX 16
202+
#define TUP_DCD_ENDPOINT_MAX 16
170203

171204
//------------- Nuvoton -------------//
172205
#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
173-
#define DCD_ATTR_ENDPOINT_MAX 8
206+
#define TUP_DCD_ENDPOINT_MAX 8
174207

175208
#elif TU_CHECK_MCU(OPT_MCU_NUC120)
176-
#define DCD_ATTR_ENDPOINT_MAX 6
209+
#define TUP_DCD_ENDPOINT_MAX 6
177210

178211
#elif TU_CHECK_MCU(OPT_MCU_NUC505)
179-
#define DCD_ATTR_ENDPOINT_MAX 12
180-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
212+
#define TUP_DCD_ENDPOINT_MAX 12
213+
#define TUP_RHPORT_HIGHSPEED 0x01
181214

182215
//------------- Espressif -------------//
183216
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
184-
#define DCD_ATTR_ENDPOINT_MAX 6
217+
#define TUP_USBIP_DWC2
218+
#define TUP_DCD_ENDPOINT_MAX 6
185219

186220
//------------- Dialog -------------//
187221
#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
188-
#define DCD_ATTR_ENDPOINT_MAX 4
222+
#define TUP_DCD_ENDPOINT_MAX 4
189223

190224
//------------- Raspberry Pi -------------//
191225
#elif TU_CHECK_MCU(OPT_MCU_RP2040)
192-
#define DCD_ATTR_ENDPOINT_MAX 16
226+
#define TUP_DCD_ENDPOINT_MAX 16
193227

194228
//------------- Silabs -------------//
195229
#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
196-
#define DCD_ATTR_ENDPOINT_MAX 7
230+
#define TUP_USBIP_DWC2
231+
#define TUP_DCD_ENDPOINT_MAX 7
197232

198233
//------------- Renesas -------------//
199234
#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
200-
#define DCD_ATTR_ENDPOINT_MAX 10
235+
#define TUP_DCD_ENDPOINT_MAX 10
201236

202237
//------------- GigaDevice -------------//
203238
#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
204-
#define DCD_ATTR_ENDPOINT_MAX 4
239+
#define TUP_USBIP_DWC2
240+
#define TUP_DCD_ENDPOINT_MAX 4
205241

206242
//------------- Broadcom -------------//
207243
#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
208-
#define DCD_ATTR_ENDPOINT_MAX 8
209-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
244+
#define TUP_USBIP_DWC2
245+
#define TUP_DCD_ENDPOINT_MAX 8
246+
#define TUP_RHPORT_HIGHSPEED 0x01
210247

211248
//------------- Broadcom -------------//
212249
#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
213-
#define DCD_ATTR_ENDPOINT_MAX 8
250+
#define TUP_USBIP_DWC2
251+
#define TUP_DCD_ENDPOINT_MAX 8
214252

215253
//------------- BridgeTek -------------//
216254
#elif TU_CHECK_MCU(OPT_MCU_FT90X)
217-
#define DCD_ATTR_ENDPOINT_MAX 8
218-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
255+
#define TUP_DCD_ENDPOINT_MAX 8
256+
#define TUP_RHPORT_HIGHSPEED 0x01
219257

220258
#elif TU_CHECK_MCU(OPT_MCU_FT93X)
221-
#define DCD_ATTR_ENDPOINT_MAX 16
222-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01
259+
#define TUP_DCD_ENDPOINT_MAX 16
260+
#define TUP_RHPORT_HIGHSPEED 0x01
223261

224262
//------------ Allwinner -------------//
225263
#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
226-
#define DCD_ATTR_ENDPOINT_MAX 4
264+
#define TUP_DCD_ENDPOINT_MAX 4
227265

228266
#endif
229267

230268
//--------------------------------------------------------------------+
231269
// Default Values
232270
//--------------------------------------------------------------------+
233271

234-
#ifndef DCD_ATTR_ENDPOINT_MAX
235-
#warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
236-
#define DCD_ATTR_ENDPOINT_MAX 8
272+
#ifndef TUP_DCD_ENDPOINT_MAX
273+
#warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
274+
#define TUP_DCD_ENDPOINT_MAX 8
237275
#endif
238276

239277
// Default to fullspeed if not defined
240-
#ifndef DCD_ATTR_RHPORT_HIGHSPEED
241-
#define DCD_ATTR_RHPORT_HIGHSPEED 0x00
278+
#ifndef TUP_RHPORT_HIGHSPEED
279+
#define TUP_RHPORT_HIGHSPEED 0x00
242280
#endif
243281

244282
#endif

‎src/device/dcd.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@
4040
//--------------------------------------------------------------------+
4141

4242
#ifndef CFG_TUD_ENDPPOINT_MAX
43-
#define CFG_TUD_ENDPPOINT_MAX DCD_ATTR_ENDPOINT_MAX
43+
#define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX
4444
#endif
4545

4646
//--------------------------------------------------------------------+

‎src/portable/chipidea/ci_hs/dcd_ci_hs.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626

2727
#include "tusb_option.h"
2828

29-
#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS)
29+
#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS)
3030

3131
//--------------------------------------------------------------------+
3232
// INCLUDE
@@ -151,8 +151,8 @@ typedef struct {
151151
// Must be at 2K alignment
152152
// Each endpoint with direction (IN/OUT) occupies a queue head
153153
// for portability, TinyUSB only queue 1 TD for each Qhd
154-
dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
155-
dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
154+
dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
155+
dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
156156
}dcd_data_t;
157157

158158
CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
@@ -619,7 +619,7 @@ void dcd_int_handler(uint8_t rhport)
619619

620620
if ( edpt_complete )
621621
{
622-
for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++)
622+
for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++)
623623
{
624624
if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT);
625625
if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN);

‎src/portable/ehci/ehci.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626

2727
#include "tusb_option.h"
2828

29-
#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI)
29+
#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI)
3030

3131
//--------------------------------------------------------------------+
3232
// INCLUDE
@@ -45,7 +45,7 @@
4545
#define EHCI_DBG 2
4646

4747
// Framelist size as small as possible to save SRAM
48-
#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS
48+
#ifdef TUP_USBIP_CHIPIDEA_HS
4949
// NXP Transdimension: 8 elements
5050
#define FRAMELIST_SIZE_BIT_VALUE 7u
5151
#define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \

0 commit comments

Comments
 (0)