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refactor khci to chipidea fs driver for device (host is not yet)
1 parent bce2821 commit d70403f

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14 files changed

+804
-40
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14 files changed

+804
-40
lines changed

.idea/cmake.xml

Lines changed: 2 additions & 1 deletion
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.idea/runConfigurations/mcx947_jlink.xml

Lines changed: 1 addition & 1 deletion
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.idea/runConfigurations/rt1010_jlink.xml

Lines changed: 1 addition & 1 deletion
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.idea/runConfigurations/rt1060_jlink.xml

Lines changed: 1 addition & 1 deletion
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hw/bsp/kinetis_kl/family.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ function(family_configure_example TARGET)
8888
# These files are built for each example since it depends on example's tusb_config.h
8989
target_sources(${TARGET} PUBLIC
9090
# TinyUSB Port
91-
${TOP}/src/portable/nxp/khci/dcd_khci.c
91+
${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
9292
${TOP}/src/portable/nxp/khci/hcd_khci.c
9393
# BSP
9494
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c

hw/bsp/mcx/boards/mcxn947brk/board.cmake

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,14 @@ set(JLINK_DEVICE MCXN947_M33_0)
55
set(PYOCD_TARGET MCXN947)
66
set(NXPLINK_DEVICE MCXN947:MCXN947)
77

8+
set(PORT 1)
9+
810
function(update_board TARGET)
911
target_compile_definitions(${TARGET} PUBLIC
1012
CPU_MCXN947VDF_cm33_core0
11-
# port 1 is highspeed
12-
BOARD_TUD_RHPORT=1
13-
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
13+
BOARD_TUD_RHPORT=${PORT}
14+
# port 0 is fullspeed, port 1 is highspeed
15+
BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
1416
)
1517
target_sources(${TARGET} PUBLIC
1618
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c

hw/bsp/mcx/family.c

Lines changed: 5 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,7 @@ void board_init(void)
6666
{
6767
BOARD_InitPins();
6868
BOARD_InitBootClocks();
69+
CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
6970

7071
// 1ms tick timer
7172
SysTick_Config(SystemCoreClock / 1000);
@@ -122,31 +123,13 @@ void board_init(void)
122123
// USB VBUS
123124
/* PORT0 PIN22 configured as USB0_VBUS */
124125

125-
CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
126-
127126
#if PORT_SUPPORT_DEVICE(0)
128127
// Port0 is Full Speed
129128

130-
/* Turn on USB0 Phy */
131-
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
132-
133-
/* reset the IP to make sure it's in reset state. */
134-
RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
135-
RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
136-
RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
137-
138-
// Enable USB Clock Adjustments to trim the FRO for the full speed controller
139-
ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
140-
CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
141-
CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
142-
143-
/*According to reference manual, device mode setting has to be set by access usb host register */
144-
CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock
145-
USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
146-
CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
147-
148-
/* enable USB Device clock */
149-
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
129+
CLOCK_AttachClk(kCLK_48M_to_USB0);
130+
CLOCK_EnableClock(kCLOCK_Usb0Ram);
131+
CLOCK_EnableClock(kCLOCK_Usb0Fs);
132+
CLOCK_EnableUsbfsClock();
150133
#endif
151134

152135
#if PORT_SUPPORT_DEVICE(1)

hw/bsp/mcx/family.cmake

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,8 @@ function(family_configure_example TARGET)
8888
#---------- Port Specific ----------
8989
# These files are built for each example since it depends on example's tusb_config.h
9090
target_sources(${TARGET} PUBLIC
91-
# TinyUSB Port
92-
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
91+
# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
92+
${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
9393
# BSP
9494
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
9595
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c

hw/bsp/mcx/family.mk

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -16,21 +16,24 @@ CFLAGS += \
1616
-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
1717
-DBOARD_TUD_RHPORT=$(PORT) \
1818

19+
# mcu driver cause following warnings
20+
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
21+
22+
# All source paths should be relative to the top level.
23+
LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
24+
25+
# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
1926
ifeq ($(PORT), 1)
2027
$(info "PORT1 High Speed")
2128
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
29+
SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c
2230
else
2331
$(info "PORT0 Full Speed")
32+
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
33+
SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c
2434
endif
2535

26-
# mcu driver cause following warnings
27-
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
28-
29-
# All source paths should be relative to the top level.
30-
LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
31-
3236
SRC_C += \
33-
src/portable/chipidea/ci_hs/dcd_ci_hs.c \
3437
$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
3538
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
3639
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \

src/common/tusb_mcu.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,11 @@
7979
#define TUP_RHPORT_HIGHSPEED 1
8080

8181
#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
82-
// NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS
82+
// USB0 is chipidea FS
83+
#define TUP_USBIP_CHIPIDEA_FS
84+
#define TUP_USBIP_CHIPIDEA_FS_MCX
85+
86+
// USB1 is chipidea HS
8387
#define TUP_USBIP_CHIPIDEA_HS
8488
#define TUP_USBIP_EHCI
8589

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