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lines changed Original file line number Diff line number Diff line change 42
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#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
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#include "ci_hs_imxrt.h"
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+ // check if memory is cacheable i.e not in DTCM
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+ TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem (uint32_t addr ) {
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+ return !(0x20000000 <= addr && addr < 0x20100000 );
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+ }
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+
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void hcd_dcache_clean (void * addr , uint32_t data_size ) {
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- SCB_CleanDCache_by_Addr ((uint32_t * ) addr , (int32_t ) data_size );
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+ if (is_cache_mem ((uint32_t ) addr )) {
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+ SCB_CleanDCache_by_Addr ((uint32_t * ) addr , (int32_t ) data_size );
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+ }
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}
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void hcd_dcache_invalidate (void * addr , uint32_t data_size ) {
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- SCB_InvalidateDCache_by_Addr (addr , (int32_t ) data_size );
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+ if (is_cache_mem ((uint32_t ) addr )) {
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+ SCB_InvalidateDCache_by_Addr (addr , (int32_t ) data_size );
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+ }
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}
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void hcd_dcache_clean_invalidate (void * addr , uint32_t data_size ) {
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+ if (is_cache_mem ((uint32_t ) addr )) {
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SCB_CleanInvalidateDCache_by_Addr (addr , (int32_t ) data_size );
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}
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+ }
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#elif TU_CHECK_MCU (OPT_MCU_LPC18XX , OPT_MCU_LPC43XX )
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#include "ci_hs_lpc18_43.h"
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