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only clean/invalidate dcache on imxrt if memory is not in DTCM
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src/portable/chipidea/ci_hs/hcd_ci_hs.c

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,17 +42,28 @@
4242
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
4343
#include "ci_hs_imxrt.h"
4444

45+
// check if memory is cacheable i.e not in DTCM
46+
TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem(uint32_t addr) {
47+
return !(0x20000000 <= addr && addr < 0x20100000);
48+
}
49+
4550
void hcd_dcache_clean(void* addr, uint32_t data_size) {
46-
SCB_CleanDCache_by_Addr((uint32_t*) addr, (int32_t) data_size);
51+
if (is_cache_mem((uint32_t) addr)) {
52+
SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
53+
}
4754
}
4855

4956
void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
50-
SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
57+
if (is_cache_mem((uint32_t) addr)) {
58+
SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
59+
}
5160
}
5261

5362
void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
63+
if (is_cache_mem((uint32_t) addr)) {
5464
SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
5565
}
66+
}
5667

5768
#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
5869
#include "ci_hs_lpc18_43.h"

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