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Commit fd50be2

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change imxrt board_uart_read() to non-blocking
simple host seems to work
1 parent 4fc4f35 commit fd50be2

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1 file changed

+42
-35
lines changed

1 file changed

+42
-35
lines changed

hw/bsp/imxrt/family.c

Lines changed: 42 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,21 @@ const uint8_t dcd_data[] = { 0x00 };
5454
//
5555
//--------------------------------------------------------------------+
5656

57+
static void init_usb_phy(USBPHY_Type* usb_phy) {
58+
// Enable PHY support for Low speed device + LS via FS Hub
59+
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
60+
61+
// Enable all power for normal operation
62+
// TODO may not be needed since it is called within CLOCK_EnableUsbhs0PhyPllClock()
63+
usb_phy->PWD = 0;
64+
65+
// TX Timing
66+
uint32_t phytx = usb_phy->TX;
67+
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
68+
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
69+
usb_phy->TX = phytx;
70+
}
71+
5772
void board_init(void)
5873
{
5974
// make sure the dcache is on.
@@ -117,52 +132,24 @@ void board_init(void)
117132

118133
LPUART_Init(UART_PORT, &uart_config, freq);
119134

120-
//------------- USB0 -------------//
135+
//------------- USB -------------//
136+
// Note: RT105x RT106x and later have dual USB controllers.
121137

122138
// Clock
123139
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
124140
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
125141

126-
USBPHY_Type* usb_phy;
127-
128-
// RT105x RT106x have dual USB controller.
129142
#ifdef USBPHY1
130-
usb_phy = USBPHY1;
143+
init_usb_phy(USBPHY1);
131144
#else
132-
usb_phy = USBPHY;
145+
init_usb_phy(USBPHY);
133146
#endif
134147

135-
// Enable PHY support for Low speed device + LS via FS Hub
136-
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
137-
138-
// Enable all power for normal operation
139-
usb_phy->PWD = 0;
140-
141-
// TX Timing
142-
uint32_t phytx = usb_phy->TX;
143-
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
144-
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
145-
usb_phy->TX = phytx;
146-
147-
// RT105x RT106x have dual USB controller.
148148
#ifdef USBPHY2
149149
// USB1
150150
CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
151151
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
152-
153-
usb_phy = USBPHY2;
154-
155-
// Enable PHY support for Low speed device + LS via FS Hub
156-
usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
157-
158-
// Enable all power for normal operation
159-
usb_phy->PWD = 0;
160-
161-
// TX Timing
162-
phytx = usb_phy->TX;
163-
phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
164-
phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
165-
usb_phy->TX = phytx;
152+
init_usb_phy(USBPHY2);
166153
#endif
167154
}
168155

@@ -208,8 +195,28 @@ uint32_t board_button_read(void)
208195

209196
int board_uart_read(uint8_t* buf, int len)
210197
{
211-
LPUART_ReadBlocking(UART_PORT, buf, len);
212-
return len;
198+
int count = 0;
199+
200+
while( count < len )
201+
{
202+
uint8_t const rx_count = LPUART_GetRxFifoCount(UART_PORT);
203+
if (!rx_count)
204+
{
205+
// clear all error flag if any
206+
uint32_t status_flags = LPUART_GetStatusFlags(UART_PORT);
207+
status_flags &= (kLPUART_RxOverrunFlag | kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag);
208+
LPUART_ClearStatusFlags(UART_PORT, status_flags);
209+
break;
210+
}
211+
212+
for(int i=0; i<rx_count; i++)
213+
{
214+
buf[count] = LPUART_ReadByte(UART_PORT);
215+
count++;
216+
}
217+
}
218+
219+
return count;
213220
}
214221

215222
int board_uart_write(void const * buf, int len)

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