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[CodeGen] Use MCRegUnit in two more TRI methods (NFC) (llvm#167680)
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5 files changed

+17
-16
lines changed

5 files changed

+17
-16
lines changed

llvm/include/llvm/CodeGen/TargetRegisterInfo.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -958,7 +958,7 @@ class LLVM_ABI TargetRegisterInfo : public MCRegisterInfo {
958958
TypeSize getRegSizeInBits(Register Reg, const MachineRegisterInfo &MRI) const;
959959

960960
/// Get the weight in units of pressure for this register unit.
961-
virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
961+
virtual unsigned getRegUnitWeight(MCRegUnit RegUnit) const = 0;
962962

963963
/// Get the number of dimensions of register pressure.
964964
virtual unsigned getNumRegPressureSets() const = 0;
@@ -978,7 +978,7 @@ class LLVM_ABI TargetRegisterInfo : public MCRegisterInfo {
978978

979979
/// Get the dimensions of register pressure impacted by this register unit.
980980
/// Returns a -1 terminated array of pressure set IDs.
981-
virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;
981+
virtual const int *getRegUnitPressureSets(MCRegUnit RegUnit) const = 0;
982982

983983
/// Get the scale factor of spill weight for this register class.
984984
virtual float getSpillWeightScaleFactor(const TargetRegisterClass *RC) const;

llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3781,7 +3781,7 @@ unsigned SIRegisterInfo::getRegPressureSetLimit(const MachineFunction &MF,
37813781
llvm_unreachable("Unexpected register pressure set!");
37823782
}
37833783

3784-
const int *SIRegisterInfo::getRegUnitPressureSets(unsigned RegUnit) const {
3784+
const int *SIRegisterInfo::getRegUnitPressureSets(MCRegUnit RegUnit) const {
37853785
static const int Empty[] = { -1 };
37863786

37873787
if (RegPressureIgnoredUnits[RegUnit])

llvm/lib/Target/AMDGPU/SIRegisterInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -357,7 +357,7 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
357357
const MachineFunction &MF, const VirtRegMap *VRM,
358358
const LiveRegMatrix *Matrix) const override;
359359

360-
const int *getRegUnitPressureSets(unsigned RegUnit) const override;
360+
const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
361361

362362
MCRegister getReturnAddressReg(const MachineFunction &MF) const;
363363

llvm/unittests/CodeGen/MFCommon.inc

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ public:
4545
static RegClassWeight Bogus{1, 16};
4646
return Bogus;
4747
}
48-
unsigned getRegUnitWeight(unsigned RegUnit) const override { return 1; }
48+
unsigned getRegUnitWeight(MCRegUnit RegUnit) const override { return 1; }
4949
unsigned getNumRegPressureSets() const override { return 0; }
5050
const char *getRegPressureSetName(unsigned Idx) const override {
5151
return "bogus";
@@ -59,7 +59,7 @@ public:
5959
static const int Bogus[] = {0, -1};
6060
return &Bogus[0];
6161
}
62-
const int *getRegUnitPressureSets(unsigned RegUnit) const override {
62+
const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override {
6363
static const int Bogus[] = {0, -1};
6464
return &Bogus[0];
6565
}

llvm/utils/TableGen/RegisterInfoEmitter.cpp

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -234,9 +234,9 @@ void RegisterInfoEmitter::EmitRegUnitPressure(raw_ostream &OS,
234234
}
235235
OS << "/// Get the weight in units of pressure for this register unit.\n"
236236
<< "unsigned " << ClassName << "::\n"
237-
<< "getRegUnitWeight(unsigned RegUnit) const {\n"
238-
<< " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
239-
<< " && \"invalid register unit\");\n";
237+
<< "getRegUnitWeight(MCRegUnit RegUnit) const {\n"
238+
<< " assert(static_cast<unsigned>(RegUnit) < "
239+
<< RegBank.getNumNativeRegUnits() << " && \"invalid register unit\");\n";
240240
if (!RegUnitsHaveUnitWeight) {
241241
OS << " static const uint8_t RUWeightTable[] = {\n ";
242242
for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits();
@@ -246,7 +246,7 @@ void RegisterInfoEmitter::EmitRegUnitPressure(raw_ostream &OS,
246246
OS << RU.Weight << ", ";
247247
}
248248
OS << "};\n"
249-
<< " return RUWeightTable[RegUnit];\n";
249+
<< " return RUWeightTable[static_cast<unsigned>(RegUnit)];\n";
250250
} else {
251251
OS << " // All register units have unit weight.\n"
252252
<< " return 1;\n";
@@ -330,9 +330,9 @@ void RegisterInfoEmitter::EmitRegUnitPressure(raw_ostream &OS,
330330
<< "register unit.\n"
331331
<< "/// Returns a -1 terminated array of pressure set IDs\n"
332332
<< "const int *" << ClassName << "::\n"
333-
<< "getRegUnitPressureSets(unsigned RegUnit) const {\n"
334-
<< " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
335-
<< " && \"invalid register unit\");\n";
333+
<< "getRegUnitPressureSets(MCRegUnit RegUnit) const {\n"
334+
<< " assert(static_cast<unsigned>(RegUnit) < "
335+
<< RegBank.getNumNativeRegUnits() << " && \"invalid register unit\");\n";
336336
OS << " static const " << getMinimalTypeForRange(PSetsSeqs.size() - 1, 32)
337337
<< " RUSetStartTable[] = {\n ";
338338
for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits();
@@ -341,7 +341,8 @@ void RegisterInfoEmitter::EmitRegUnitPressure(raw_ostream &OS,
341341
<< ",";
342342
}
343343
OS << "};\n"
344-
<< " return &RCSetsTable[RUSetStartTable[RegUnit]];\n"
344+
<< " return "
345+
"&RCSetsTable[RUSetStartTable[static_cast<unsigned>(RegUnit)]];\n"
345346
<< "}\n\n";
346347
}
347348

@@ -1168,15 +1169,15 @@ void RegisterInfoEmitter::runTargetHeader(raw_ostream &OS) {
11681169
}
11691170
OS << " const RegClassWeight &getRegClassWeight("
11701171
<< "const TargetRegisterClass *RC) const override;\n"
1171-
<< " unsigned getRegUnitWeight(unsigned RegUnit) const override;\n"
1172+
<< " unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;\n"
11721173
<< " unsigned getNumRegPressureSets() const override;\n"
11731174
<< " const char *getRegPressureSetName(unsigned Idx) const override;\n"
11741175
<< " unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned "
11751176
"Idx) const override;\n"
11761177
<< " const int *getRegClassPressureSets("
11771178
<< "const TargetRegisterClass *RC) const override;\n"
11781179
<< " const int *getRegUnitPressureSets("
1179-
<< "unsigned RegUnit) const override;\n"
1180+
<< "MCRegUnit RegUnit) const override;\n"
11801181
<< " ArrayRef<const char *> getRegMaskNames() const override;\n"
11811182
<< " ArrayRef<const uint32_t *> getRegMasks() const override;\n"
11821183
<< " bool isGeneralPurposeRegister(const MachineFunction &, "

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