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Automerge: [mlir][python] Add bindings for OpenACC dialect (#163620)
Adds initial support for Python bindings to the OpenACC dialect. * The bindings do not provide any niceties yet, just the barebones exposure of the dialect to Python. Construction of OpenACC ops is therefore verbose and somewhat inconvenient, as evidenced by the test. * The test only constructs one module, but I attempted to use enough operations to be meaningful. It does not test all the ops exposed, but does contain a realistic example of a memcpy idiom.
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‎mlir/python/CMakeLists.txt‎

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@@ -134,6 +134,16 @@ declare_mlir_dialect_python_bindings(
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dialects/func.py
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DIALECT_NAME func)
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declare_mlir_dialect_python_bindings(
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ADD_TO_PARENT MLIRPythonSources.Dialects
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ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}/mlir"
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TD_FILE dialects/OpenACCOps.td
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SOURCES
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dialects/openacc.py
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DIALECT_NAME acc
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DEPENDS acc_common_td
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)
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declare_mlir_dialect_python_bindings(
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ADD_TO_PARENT MLIRPythonSources.Dialects
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ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}/mlir"

‎mlir/python/mlir/dialects/OpenACCOps.td‎

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//===-- OpenACCOps.td - Entry point for OpenACCOps bind ------------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef PYTHON_BINDINGS_OPENACC_OPS
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#define PYTHON_BINDINGS_OPENACC_OPS
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include "mlir/Dialect/OpenACC/OpenACCOps.td"
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#endif

‎mlir/python/mlir/dialects/openacc.py‎

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# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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# See https://llvm.org/LICENSE.txt for license information.
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# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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from ._acc_ops_gen import *

‎mlir/test/python/dialects/openacc.py‎

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# RUN: python %s | FileCheck %s
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from unittest import result
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from mlir.ir import (
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Context,
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FunctionType,
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Location,
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Module,
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InsertionPoint,
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IntegerType,
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IndexType,
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MemRefType,
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F32Type,
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Block,
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ArrayAttr,
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Attribute,
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UnitAttr,
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StringAttr,
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DenseI32ArrayAttr,
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ShapedType,
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)
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from mlir.dialects import openacc, func, arith, memref
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from mlir.extras import types
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def run(f):
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print("\n// TEST:", f.__name__)
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with Context(), Location.unknown():
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f()
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return f
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@run
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def testParallelMemcpy():
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module = Module.create()
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dynamic = ShapedType.get_dynamic_size()
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memref_f32_1d_any = MemRefType.get([dynamic], types.f32())
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with InsertionPoint(module.body):
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function_type = FunctionType.get(
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[memref_f32_1d_any, memref_f32_1d_any, types.i64()], []
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)
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f = func.FuncOp(
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type=function_type,
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name="memcpy_idiom",
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)
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f.attributes["sym_visibility"] = StringAttr.get("public")
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with InsertionPoint(f.add_entry_block()):
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c1024 = arith.ConstantOp(types.i32(), 1024)
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c128 = arith.ConstantOp(types.i32(), 128)
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arg0, arg1, arg2 = f.arguments
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copied = openacc.copyin(
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acc_var=arg0.type,
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var=arg0,
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var_type=types.f32(),
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bounds=[],
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async_operands=[],
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implicit=False,
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structured=True,
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)
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created = openacc.create_(
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acc_var=arg1.type,
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var=arg1,
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var_type=types.f32(),
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bounds=[],
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async_operands=[],
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implicit=False,
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structured=True,
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)
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parallel_op = openacc.ParallelOp(
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asyncOperands=[],
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waitOperands=[],
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numGangs=[c1024],
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numWorkers=[],
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vectorLength=[c128],
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reductionOperands=[],
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privateOperands=[],
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firstprivateOperands=[],
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dataClauseOperands=[],
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)
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# Set required device_type and segment attributes to satisfy verifier
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acc_device_none = ArrayAttr.get([Attribute.parse("#acc.device_type<none>")])
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parallel_op.numGangsDeviceType = acc_device_none
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parallel_op.numGangsSegments = DenseI32ArrayAttr.get([1])
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parallel_op.vectorLengthDeviceType = acc_device_none
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parallel_block = Block.create_at_start(parent=parallel_op.region, arg_types=[])
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with InsertionPoint(parallel_block):
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c0 = arith.ConstantOp(types.i64(), 0)
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c1 = arith.ConstantOp(types.i64(), 1)
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loop_op = openacc.LoopOp(
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results_=[],
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lowerbound=[c0],
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upperbound=[f.arguments[2]],
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step=[c1],
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gangOperands=[],
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workerNumOperands=[],
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vectorOperands=[],
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tileOperands=[],
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cacheOperands=[],
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privateOperands=[],
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reductionOperands=[],
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firstprivateOperands=[],
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)
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# Set loop attributes: gang and independent on device_type<none>
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acc_device_none = ArrayAttr.get([Attribute.parse("#acc.device_type<none>")])
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loop_op.gang = acc_device_none
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loop_op.independent = acc_device_none
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loop_block = Block.create_at_start(
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parent=loop_op.region, arg_types=[types.i64()]
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)
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with InsertionPoint(loop_block):
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idx = arith.index_cast(out=IndexType.get(), in_=loop_block.arguments[0])
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val = memref.load(memref=copied, indices=[idx])
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memref.store(value=val, memref=created, indices=[idx])
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openacc.YieldOp([])
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openacc.YieldOp([])
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deleted = openacc.delete(
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acc_var=copied,
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bounds=[],
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async_operands=[],
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implicit=False,
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structured=True,
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)
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copied = openacc.copyout(
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acc_var=created,
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var=arg1,
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var_type=types.f32(),
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bounds=[],
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async_operands=[],
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implicit=False,
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structured=True,
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)
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func.ReturnOp([])
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print(module)
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# CHECK: TEST: testParallelMemcpy
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# CHECK-LABEL: func.func public @memcpy_idiom(
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# CHECK-SAME: %[[ARG0:.*]]: memref<?xf32>, %[[ARG1:.*]]: memref<?xf32>, %[[ARG2:.*]]: i64) {
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# CHECK: %[[CONSTANT_0:.*]] = arith.constant 1024 : i32
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# CHECK: %[[CONSTANT_1:.*]] = arith.constant 128 : i32
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# CHECK: %[[COPYIN_0:.*]] = acc.copyin varPtr(%[[ARG0]] : memref<?xf32>) -> memref<?xf32>
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# CHECK: %[[CREATE_0:.*]] = acc.create varPtr(%[[ARG1]] : memref<?xf32>) -> memref<?xf32>
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# CHECK: acc.parallel num_gangs({%[[CONSTANT_0]] : i32}) vector_length(%[[CONSTANT_1]] : i32) {
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# CHECK: %[[CONSTANT_2:.*]] = arith.constant 0 : i64
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# CHECK: %[[CONSTANT_3:.*]] = arith.constant 1 : i64
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# CHECK: acc.loop gang control(%[[VAL_0:.*]] : i64) = (%[[CONSTANT_2]] : i64) to (%[[ARG2]] : i64) step (%[[CONSTANT_3]] : i64) {
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# CHECK: %[[INDEX_CAST_0:.*]] = arith.index_cast %[[VAL_0]] : i64 to index
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# CHECK: %[[LOAD_0:.*]] = memref.load %[[COPYIN_0]]{{\[}}%[[INDEX_CAST_0]]] : memref<?xf32>
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# CHECK: memref.store %[[LOAD_0]], %[[CREATE_0]]{{\[}}%[[INDEX_CAST_0]]] : memref<?xf32>
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# CHECK: acc.yield
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# CHECK: } attributes {independent = [#acc.device_type<none>]}
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# CHECK: acc.yield
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# CHECK: }
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# CHECK: acc.delete accPtr(%[[COPYIN_0]] : memref<?xf32>)
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# CHECK: acc.copyout accPtr(%[[CREATE_0]] : memref<?xf32>) to varPtr(%[[ARG1]] : memref<?xf32>)
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# CHECK: return
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# CHECK: }

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