Skip to content

Commit 0d22f83

Browse files
arcbbbarcbbb
authored
[LV][EVL] Remove metadata on EVL vectorized loops (#155760)
This patch removes the metadata emission for EVL‑vectorized loops, since there is no current in-tree consumer: 1) after VPlan performs canonical IV replacement #147222 and 2) RISCV dropped EVLIndVarSimplifyPass #151483, which was the only user of this metadata.
1 parent 7a8bff4 commit 0d22f83

22 files changed

+361
-405
lines changed

‎llvm/lib/Transforms/Vectorize/VPlan.cpp‎

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1700,26 +1700,6 @@ void LoopVectorizationPlanner::updateLoopMetadataAndProfileInfo(
17001700
LoopVectorizeHints Hints(VectorLoop, true, *ORE);
17011701
Hints.setAlreadyVectorized();
17021702
}
1703-
1704-
// Check if it's EVL-vectorized and mark the corresponding metadata.
1705-
bool IsEVLVectorized =
1706-
llvm::any_of(*HeaderVPBB, [](const VPRecipeBase &Recipe) {
1707-
// Looking for the ExplictVectorLength VPInstruction.
1708-
if (const auto *VI = dyn_cast<VPInstruction>(&Recipe))
1709-
return VI->getOpcode() == VPInstruction::ExplicitVectorLength;
1710-
return false;
1711-
});
1712-
if (IsEVLVectorized) {
1713-
LLVMContext &Context = VectorLoop->getHeader()->getContext();
1714-
MDNode *LoopID = VectorLoop->getLoopID();
1715-
auto *IsEVLVectorizedMD = MDNode::get(
1716-
Context,
1717-
{MDString::get(Context, "llvm.loop.isvectorized.tailfoldingstyle"),
1718-
MDString::get(Context, "evl")});
1719-
MDNode *NewLoopID = makePostTransformationMetadata(Context, LoopID, {},
1720-
{IsEVLVectorizedMD});
1721-
VectorLoop->setLoopID(NewLoopID);
1722-
}
17231703
}
17241704
TargetTransformInfo::UnrollingPreferences UP;
17251705
TTI.getUnrollingPreferences(VectorLoop, *PSE.getSE(), UP, ORE);

‎llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll‎

Lines changed: 27 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ define void @block_with_dead_inst_2(ptr %src) #0 {
105105
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]
106106
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
107107
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
108-
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
108+
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
109109
; CHECK: [[MIDDLE_BLOCK]]:
110110
; CHECK-NEXT: br label %[[EXIT:.*]]
111111
; CHECK: [[SCALAR_PH:.*]]:
@@ -179,7 +179,7 @@ define void @multiple_blocks_with_dead_insts_3(ptr %src) #0 {
179179
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]
180180
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
181181
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
182-
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
182+
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
183183
; CHECK: [[MIDDLE_BLOCK]]:
184184
; CHECK-NEXT: br label %[[EXIT:.*]]
185185
; CHECK: [[SCALAR_PH:.*]]:
@@ -263,7 +263,7 @@ define void @multiple_blocks_with_dead_insts_4(ptr %src, i64 %N) #0 {
263263
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP14]]
264264
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[DOTSPLAT]]
265265
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
266-
; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
266+
; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
267267
; CHECK: [[MIDDLE_BLOCK]]:
268268
; CHECK-NEXT: br label %[[EXIT:.*]]
269269
; CHECK: [[SCALAR_PH:.*]]:
@@ -349,7 +349,7 @@ define void @multiple_blocks_with_dead_inst_multiple_successors_5(ptr %src) #0 {
349349
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]
350350
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
351351
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
352-
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
352+
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
353353
; CHECK: [[MIDDLE_BLOCK]]:
354354
; CHECK-NEXT: br label %[[EXIT:.*]]
355355
; CHECK: [[SCALAR_PH:.*]]:
@@ -453,7 +453,7 @@ define void @multiple_blocks_with_dead_inst_multiple_successors_6(ptr %src, i1 %
453453
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP25]]
454454
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[DOTSPLAT]]
455455
; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
456-
; CHECK-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
456+
; CHECK-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
457457
; CHECK: [[MIDDLE_BLOCK]]:
458458
; CHECK-NEXT: br label %[[EXIT:.*]]
459459
; CHECK: [[SCALAR_PH:.*]]:
@@ -540,7 +540,7 @@ define void @empty_block_with_phi_1(ptr %src, i64 %N) #0 {
540540
; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP11]], [[TMP9]]
541541
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]
542542
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
543-
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
543+
; CHECK-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
544544
; CHECK: [[MIDDLE_BLOCK]]:
545545
; CHECK-NEXT: br label %[[EXIT:.*]]
546546
; CHECK: [[SCALAR_PH:.*]]:
@@ -610,7 +610,7 @@ define void @empty_block_with_phi_2(ptr %src, i64 %N) #0 {
610610
; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP11]], [[TMP9]]
611611
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP11]]
612612
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
613-
; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
613+
; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
614614
; CHECK: [[MIDDLE_BLOCK]]:
615615
; CHECK-NEXT: br label %[[EXIT:.*]]
616616
; CHECK: [[SCALAR_PH:.*]]:
@@ -707,12 +707,12 @@ define void @dead_load_in_block(ptr %dst, ptr %src, i8 %N, i64 %x) #0 {
707707
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP23]], i64 0
708708
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
709709
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[DST]], <vscale x 4 x i64> [[VEC_IND]]
710-
; CHECK-NEXT: call void @llvm.vp.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x ptr> align 4 [[TMP21]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP18]]), !alias.scope [[META11:![0-9]+]], !noalias [[META14:![0-9]+]]
710+
; CHECK-NEXT: call void @llvm.vp.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x ptr> align 4 [[TMP21]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP18]]), !alias.scope [[META10:![0-9]+]], !noalias [[META13:![0-9]+]]
711711
; CHECK-NEXT: [[TMP22:%.*]] = zext i32 [[TMP18]] to i64
712712
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP22]]
713713
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
714714
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
715-
; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
715+
; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
716716
; CHECK: [[MIDDLE_BLOCK]]:
717717
; CHECK-NEXT: br label %[[EXIT:.*]]
718718
; CHECK: [[SCALAR_PH]]:
@@ -731,7 +731,7 @@ define void @dead_load_in_block(ptr %dst, ptr %src, i8 %N, i64 %x) #0 {
731731
; CHECK-NEXT: store i32 0, ptr [[GEP_DST]], align 4
732732
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 3
733733
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV]], [[N_EXT]]
734-
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP18:![0-9]+]]
734+
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP17:![0-9]+]]
735735
; CHECK: [[EXIT]]:
736736
; CHECK-NEXT: ret void
737737
;
@@ -763,23 +763,22 @@ exit:
763763

764764
attributes #0 = { "target-features"="+64bit,+v" }
765765
;.
766-
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]], [[META3:![0-9]+]]}
766+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
767767
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
768-
; CHECK: [[META2]] = !{!"llvm.loop.isvectorized.tailfoldingstyle", !"evl"}
769-
; CHECK: [[META3]] = !{!"llvm.loop.unroll.runtime.disable"}
770-
; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]], [[META3]]}
771-
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]], [[META3]]}
772-
; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]], [[META3]]}
773-
; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]], [[META3]]}
774-
; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]], [[META3]]}
775-
; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]], [[META3]]}
776-
; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]], [[META3]]}
777-
; CHECK: [[META11]] = !{[[META12:![0-9]+]]}
778-
; CHECK: [[META12]] = distinct !{[[META12]], [[META13:![0-9]+]]}
779-
; CHECK: [[META13]] = distinct !{[[META13]], !"LVerDomain"}
780-
; CHECK: [[META14]] = !{[[META15:![0-9]+]], [[META16:![0-9]+]]}
781-
; CHECK: [[META15]] = distinct !{[[META15]], [[META13]]}
782-
; CHECK: [[META16]] = distinct !{[[META16]], [[META13]]}
783-
; CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]], [[META3]]}
784-
; CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
768+
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
769+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
770+
; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
771+
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
772+
; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
773+
; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
774+
; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
775+
; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
776+
; CHECK: [[META10]] = !{[[META11:![0-9]+]]}
777+
; CHECK: [[META11]] = distinct !{[[META11]], [[META12:![0-9]+]]}
778+
; CHECK: [[META12]] = distinct !{[[META12]], !"LVerDomain"}
779+
; CHECK: [[META13]] = !{[[META14:![0-9]+]], [[META15:![0-9]+]]}
780+
; CHECK: [[META14]] = distinct !{[[META14]], [[META12]]}
781+
; CHECK: [[META15]] = distinct !{[[META15]], [[META12]]}
782+
; CHECK: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
783+
; CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]]}
785784
;.

0 commit comments

Comments
 (0)