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Automerge: [AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)
Saves around 125-210 MB of compilation memory usage per source for roughly one third of our backend sources, ~60 MB on average.
2 parents c1f4a4a + faca8c9 commit 0ee9165

17 files changed

+75
-54
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp‎

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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/UniformityAnalysis.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/InstVisitor.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Support/KnownFPClass.h"

‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp‎

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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Support/ErrorHandling.h"
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#ifdef EXPENSIVE_CHECKS

‎llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp‎

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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstVisitor.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Transforms/Utils/Local.h"

‎llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp‎

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#include "llvm/ADT/SetOperations.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Analysis/InstSimplifyFolder.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/Utils/Local.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/AttributeMask.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/IR/ReplaceConstant.h"
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#include "llvm/IR/ValueHandle.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/AMDGPUAddrSpace.h"
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#include "llvm/Support/Alignment.h"

‎llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp‎

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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InlineAsm.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/MDBuilder.h"
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#include "llvm/IR/ReplaceConstant.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"

‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp‎

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#include "llvm/IR/PatternMatch.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Passes/CodeGenPassBuilder.h"
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#include "llvm/Passes/PassBuilder.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/FormatVariadic.h"
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using namespace llvm::PatternMatch;
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namespace {
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//===----------------------------------------------------------------------===//
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// AMDGPU CodeGen Pass Builder interface.
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//===----------------------------------------------------------------------===//
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class AMDGPUCodeGenPassBuilder
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: public CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine> {
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using Base = CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine>;
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public:
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AMDGPUCodeGenPassBuilder(GCNTargetMachine &TM,
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const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC);
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void addIRPasses(AddIRPass &) const;
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void addCodeGenPrepare(AddIRPass &) const;
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void addPreISel(AddIRPass &addPass) const;
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void addILPOpts(AddMachinePass &) const;
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void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
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Error addInstSelector(AddMachinePass &) const;
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void addPreRewrite(AddMachinePass &) const;
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void addMachineSSAOptimization(AddMachinePass &) const;
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void addPostRegAlloc(AddMachinePass &) const;
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void addPreEmitPass(AddMachinePass &) const;
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void addPreEmitRegAlloc(AddMachinePass &) const;
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Error addRegAssignmentOptimized(AddMachinePass &) const;
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void addPreRegAlloc(AddMachinePass &) const;
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void addOptimizedRegAlloc(AddMachinePass &) const;
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void addPreSched2(AddMachinePass &) const;
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/// Check if a pass is enabled given \p Opt option. The option always
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/// overrides defaults if explicitly used. Otherwise its default will be used
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/// given that a pass shall work at an optimization \p Level minimum.
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bool isPassEnabled(const cl::opt<bool> &Opt,
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CodeGenOptLevel Level = CodeGenOptLevel::Default) const;
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void addEarlyCSEOrGVNPass(AddIRPass &) const;
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void addStraightLineScalarOptimizationPasses(AddIRPass &) const;
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};
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class SGPRRegisterRegAlloc : public RegisterRegAllocBase<SGPRRegisterRegAlloc> {
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public:
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SGPRRegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)

‎llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h‎

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#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Passes/CodeGenPassBuilder.h"
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#include <optional>
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#include <utility>
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}
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};
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//===----------------------------------------------------------------------===//
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// AMDGPU CodeGen Pass Builder interface.
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//===----------------------------------------------------------------------===//
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class AMDGPUCodeGenPassBuilder
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: public CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine> {
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using Base = CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine>;
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public:
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AMDGPUCodeGenPassBuilder(GCNTargetMachine &TM,
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const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC);
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void addIRPasses(AddIRPass &) const;
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void addCodeGenPrepare(AddIRPass &) const;
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void addPreISel(AddIRPass &addPass) const;
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void addILPOpts(AddMachinePass &) const;
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void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
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Error addInstSelector(AddMachinePass &) const;
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void addPreRewrite(AddMachinePass &) const;
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void addMachineSSAOptimization(AddMachinePass &) const;
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void addPostRegAlloc(AddMachinePass &) const;
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void addPreEmitPass(AddMachinePass &) const;
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void addPreEmitRegAlloc(AddMachinePass &) const;
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Error addRegAssignmentOptimized(AddMachinePass &) const;
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void addPreRegAlloc(AddMachinePass &) const;
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void addOptimizedRegAlloc(AddMachinePass &) const;
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void addPreSched2(AddMachinePass &) const;
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/// Check if a pass is enabled given \p Opt option. The option always
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/// overrides defaults if explicitly used. Otherwise its default will be used
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/// given that a pass shall work at an optimization \p Level minimum.
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bool isPassEnabled(const cl::opt<bool> &Opt,
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CodeGenOptLevel Level = CodeGenOptLevel::Default) const;
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void addEarlyCSEOrGVNPass(AddIRPass &) const;
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void addStraightLineScalarOptimizationPasses(AddIRPass &) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H

‎llvm/lib/Target/AMDGPU/R600ISelLowering.cpp‎

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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/IntrinsicsR600.h"
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#include "llvm/Passes/CodeGenPassBuilder.h"
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using namespace llvm;
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‎llvm/lib/Target/AMDGPU/R600TargetMachine.cpp‎

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#include "R600MachineFunctionInfo.h"
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#include "R600MachineScheduler.h"
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#include "R600TargetTransformInfo.h"
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#include "llvm/Passes/CodeGenPassBuilder.h"
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#include "llvm/Transforms/Scalar.h"
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#include <optional>
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"Run R600's custom scheduler",
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createR600MachineScheduler);
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//===----------------------------------------------------------------------===//
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// R600 CodeGen Pass Builder interface.
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//===----------------------------------------------------------------------===//
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class R600CodeGenPassBuilder
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: public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
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public:
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R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC);
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void addPreISel(AddIRPass &addPass) const;
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void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
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Error addInstSelector(AddMachinePass &) const;
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};
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman)
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//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AMDGPU/R600TargetMachine.h‎

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createMachineScheduler(MachineSchedContext *C) const override;
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};
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//===----------------------------------------------------------------------===//
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// R600 CodeGen Pass Builder interface.
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//===----------------------------------------------------------------------===//
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class R600CodeGenPassBuilder
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: public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
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public:
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R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC);
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void addPreISel(AddIRPass &addPass) const;
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void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
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Error addInstSelector(AddMachinePass &) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H

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