@@ -395,3 +395,37 @@ define i64 @freeze_array() {
395395 %t1 = add i64 %v1 , %v2
396396 ret i64 %t1
397397}
398+
399+ define <8 x i16 > @freeze_abdu (<8 x i16 > %a , <8 x i16 > %b ) {
400+ ; CHECK-SD-LABEL: freeze_abdu:
401+ ; CHECK-SD: // %bb.0:
402+ ; CHECK-SD-NEXT: uaba v0.8h, v0.8h, v1.8h
403+ ; CHECK-SD-NEXT: ret
404+ ;
405+ ; CHECK-GI-LABEL: freeze_abdu:
406+ ; CHECK-GI: // %bb.0:
407+ ; CHECK-GI-NEXT: uabd v1.8h, v0.8h, v1.8h
408+ ; CHECK-GI-NEXT: add v0.8h, v0.8h, v1.8h
409+ ; CHECK-GI-NEXT: ret
410+ %d = call <8 x i16 > @llvm.aarch64.neon.uabd.v8i16 (<8 x i16 > %a , <8 x i16 > %b )
411+ %f = freeze <8 x i16 > %d
412+ %r = add <8 x i16 > %a , %f
413+ ret <8 x i16 > %r
414+ }
415+
416+ define <8 x i16 > @freeze_abds (<8 x i16 > %a , <8 x i16 > %b ) {
417+ ; CHECK-SD-LABEL: freeze_abds:
418+ ; CHECK-SD: // %bb.0:
419+ ; CHECK-SD-NEXT: saba v0.8h, v0.8h, v1.8h
420+ ; CHECK-SD-NEXT: ret
421+ ;
422+ ; CHECK-GI-LABEL: freeze_abds:
423+ ; CHECK-GI: // %bb.0:
424+ ; CHECK-GI-NEXT: sabd v1.8h, v0.8h, v1.8h
425+ ; CHECK-GI-NEXT: add v0.8h, v0.8h, v1.8h
426+ ; CHECK-GI-NEXT: ret
427+ %d = call <8 x i16 > @llvm.aarch64.neon.sabd.v8i16 (<8 x i16 > %a , <8 x i16 > %b )
428+ %f = freeze <8 x i16 > %d
429+ %r = add <8 x i16 > %a , %f
430+ ret <8 x i16 > %r
431+ }
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