@@ -123,7 +123,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
123123 SmallSet<std::pair<const MachineInstr *, unsigned >, 4 > Visited;
124124 SmallVector<std::pair<const MachineInstr *, unsigned >, 4 > Worklist;
125125
126- Worklist.push_back ( std::make_pair ( &OrigMI, OrigBits) );
126+ Worklist.emplace_back ( &OrigMI, OrigBits);
127127
128128 while (!Worklist.empty ()) {
129129 auto P = Worklist.pop_back_val ();
@@ -213,7 +213,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
213213 // as an N-Bit user.
214214 unsigned ShAmt = UserMI->getOperand (2 ).getImm ();
215215 if (Bits > ShAmt) {
216- Worklist.push_back ( std::make_pair ( UserMI, Bits - ShAmt) );
216+ Worklist.emplace_back ( UserMI, Bits - ShAmt);
217217 break ;
218218 }
219219 return false ;
@@ -225,29 +225,29 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
225225 unsigned ShAmt = UserMI->getOperand (2 ).getImm ();
226226 if (Bits >= (ST.getXLen () - ShAmt))
227227 break ;
228- Worklist.push_back ( std::make_pair ( UserMI, Bits + ShAmt) );
228+ Worklist.emplace_back ( UserMI, Bits + ShAmt);
229229 break ;
230230 }
231231 case RISCV::SLLIW: {
232232 unsigned ShAmt = UserMI->getOperand (2 ).getImm ();
233233 if (Bits >= 32 - ShAmt)
234234 break ;
235- Worklist.push_back ( std::make_pair ( UserMI, Bits + ShAmt) );
235+ Worklist.emplace_back ( UserMI, Bits + ShAmt);
236236 break ;
237237 }
238238
239239 case RISCV::ANDI: {
240240 uint64_t Imm = UserMI->getOperand (2 ).getImm ();
241241 if (Bits >= (unsigned )llvm::bit_width (Imm))
242242 break ;
243- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
243+ Worklist.emplace_back ( UserMI, Bits);
244244 break ;
245245 }
246246 case RISCV::ORI: {
247247 uint64_t Imm = UserMI->getOperand (2 ).getImm ();
248248 if (Bits >= (unsigned )llvm::bit_width<uint64_t >(~Imm))
249249 break ;
250- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
250+ Worklist.emplace_back ( UserMI, Bits);
251251 break ;
252252 }
253253
@@ -261,7 +261,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
261261 break ;
262262 return false ;
263263 }
264- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
264+ Worklist.emplace_back ( UserMI, Bits);
265265 break ;
266266
267267 case RISCV::SRA:
@@ -280,7 +280,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
280280 // Operand 1 is implicitly zero extended.
281281 if (OpIdx == 1 && Bits >= 32 )
282282 break ;
283- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
283+ Worklist.emplace_back ( UserMI, Bits);
284284 break ;
285285
286286 case RISCV::BEXTI:
@@ -328,13 +328,13 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
328328 case RISCV::BSETI:
329329 case RISCV::BCLRI:
330330 case RISCV::BINVI:
331- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
331+ Worklist.emplace_back ( UserMI, Bits);
332332 break ;
333333
334334 case RISCV::BREV8:
335335 case RISCV::ORC_B:
336336 // BREV8 and ORC_B work on bytes. Round Bits down to the nearest byte.
337- Worklist.push_back ( std::make_pair ( UserMI, alignDown (Bits, 8 ) ));
337+ Worklist.emplace_back ( UserMI, alignDown (Bits, 8 ));
338338 break ;
339339
340340 case RISCV::PseudoCCMOVGPR:
@@ -344,7 +344,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
344344 // of operand 4 and 5 is used.
345345 if (OpIdx != 4 && OpIdx != 5 )
346346 return false ;
347- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
347+ Worklist.emplace_back ( UserMI, Bits);
348348 break ;
349349
350350 case RISCV::CZERO_EQZ:
@@ -353,7 +353,7 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
353353 case RISCV::VT_MASKCN:
354354 if (OpIdx != 1 )
355355 return false ;
356- Worklist.push_back ( std::make_pair ( UserMI, Bits) );
356+ Worklist.emplace_back ( UserMI, Bits);
357357 break ;
358358 }
359359 }
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