|
24 | 24 | #include "llvm/ADT/STLExtras.h" |
25 | 25 | #include "llvm/ADT/SmallSet.h" |
26 | 26 | #include "llvm/ADT/SmallVector.h" |
| 27 | +#include "llvm/CodeGen/CFIInstBuilder.h" |
27 | 28 | #include "llvm/CodeGen/DFAPacketizer.h" |
28 | 29 | #include "llvm/CodeGen/LiveVariables.h" |
29 | 30 | #include "llvm/CodeGen/MachineBasicBlock.h" |
@@ -6485,51 +6486,20 @@ void ARMBaseInstrInfo::saveLROnStack(MachineBasicBlock &MBB, |
6485 | 6486 | if (!CFI) |
6486 | 6487 | return; |
6487 | 6488 |
|
6488 | | - MachineFunction &MF = *MBB.getParent(); |
6489 | | - |
6490 | 6489 | // Add a CFI, saying CFA is offset by Align bytes from SP. |
6491 | | - int64_t StackPosEntry = |
6492 | | - MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Align)); |
6493 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6494 | | - .addCFIIndex(StackPosEntry) |
6495 | | - .setMIFlags(MachineInstr::FrameSetup); |
| 6490 | + CFIInstBuilder CFIBuilder(MBB, It, MachineInstr::FrameSetup); |
| 6491 | + CFIBuilder.buildDefCFAOffset(Align); |
6496 | 6492 |
|
6497 | 6493 | // Add a CFI saying that the LR that we want to find is now higher than |
6498 | 6494 | // before. |
6499 | 6495 | int LROffset = Auth ? Align - 4 : Align; |
6500 | | - const MCRegisterInfo *MRI = Subtarget.getRegisterInfo(); |
6501 | | - unsigned DwarfLR = MRI->getDwarfRegNum(ARM::LR, true); |
6502 | | - int64_t LRPosEntry = MF.addFrameInst( |
6503 | | - MCCFIInstruction::createOffset(nullptr, DwarfLR, -LROffset)); |
6504 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6505 | | - .addCFIIndex(LRPosEntry) |
6506 | | - .setMIFlags(MachineInstr::FrameSetup); |
| 6496 | + CFIBuilder.buildOffset(ARM::LR, -LROffset); |
6507 | 6497 | if (Auth) { |
6508 | 6498 | // Add a CFI for the location of the return adddress PAC. |
6509 | | - unsigned DwarfRAC = MRI->getDwarfRegNum(ARM::RA_AUTH_CODE, true); |
6510 | | - int64_t RACPosEntry = MF.addFrameInst( |
6511 | | - MCCFIInstruction::createOffset(nullptr, DwarfRAC, -Align)); |
6512 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6513 | | - .addCFIIndex(RACPosEntry) |
6514 | | - .setMIFlags(MachineInstr::FrameSetup); |
| 6499 | + CFIBuilder.buildOffset(ARM::RA_AUTH_CODE, -Align); |
6515 | 6500 | } |
6516 | 6501 | } |
6517 | 6502 |
|
6518 | | -void ARMBaseInstrInfo::emitCFIForLRSaveToReg(MachineBasicBlock &MBB, |
6519 | | - MachineBasicBlock::iterator It, |
6520 | | - Register Reg) const { |
6521 | | - MachineFunction &MF = *MBB.getParent(); |
6522 | | - const MCRegisterInfo *MRI = Subtarget.getRegisterInfo(); |
6523 | | - unsigned DwarfLR = MRI->getDwarfRegNum(ARM::LR, true); |
6524 | | - unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); |
6525 | | - |
6526 | | - int64_t LRPosEntry = MF.addFrameInst( |
6527 | | - MCCFIInstruction::createRegister(nullptr, DwarfLR, DwarfReg)); |
6528 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6529 | | - .addCFIIndex(LRPosEntry) |
6530 | | - .setMIFlags(MachineInstr::FrameSetup); |
6531 | | -} |
6532 | | - |
6533 | 6503 | void ARMBaseInstrInfo::restoreLRFromStack(MachineBasicBlock &MBB, |
6534 | 6504 | MachineBasicBlock::iterator It, |
6535 | 6505 | bool CFI, bool Auth) const { |
@@ -6560,50 +6530,18 @@ void ARMBaseInstrInfo::restoreLRFromStack(MachineBasicBlock &MBB, |
6560 | 6530 | } |
6561 | 6531 |
|
6562 | 6532 | if (CFI) { |
6563 | | - // Now stack has moved back up... |
6564 | | - MachineFunction &MF = *MBB.getParent(); |
6565 | | - const MCRegisterInfo *MRI = Subtarget.getRegisterInfo(); |
6566 | | - unsigned DwarfLR = MRI->getDwarfRegNum(ARM::LR, true); |
6567 | | - int64_t StackPosEntry = |
6568 | | - MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, 0)); |
6569 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6570 | | - .addCFIIndex(StackPosEntry) |
6571 | | - .setMIFlags(MachineInstr::FrameDestroy); |
6572 | | - |
6573 | | - // ... and we have restored LR. |
6574 | | - int64_t LRPosEntry = |
6575 | | - MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, DwarfLR)); |
6576 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6577 | | - .addCFIIndex(LRPosEntry) |
6578 | | - .setMIFlags(MachineInstr::FrameDestroy); |
6579 | | - |
6580 | | - if (Auth) { |
6581 | | - unsigned DwarfRAC = MRI->getDwarfRegNum(ARM::RA_AUTH_CODE, true); |
6582 | | - int64_t Entry = |
6583 | | - MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, DwarfRAC)); |
6584 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6585 | | - .addCFIIndex(Entry) |
6586 | | - .setMIFlags(MachineInstr::FrameDestroy); |
6587 | | - } |
| 6533 | + // Now stack has moved back up and we have restored LR. |
| 6534 | + CFIInstBuilder CFIBuilder(MBB, It, MachineInstr::FrameDestroy); |
| 6535 | + CFIBuilder.buildDefCFAOffset(0); |
| 6536 | + CFIBuilder.buildRestore(ARM::LR); |
| 6537 | + if (Auth) |
| 6538 | + CFIBuilder.buildUndefined(ARM::RA_AUTH_CODE); |
6588 | 6539 | } |
6589 | 6540 |
|
6590 | 6541 | if (Auth) |
6591 | 6542 | BuildMI(MBB, It, DebugLoc(), get(ARM::t2AUT)); |
6592 | 6543 | } |
6593 | 6544 |
|
6594 | | -void ARMBaseInstrInfo::emitCFIForLRRestoreFromReg( |
6595 | | - MachineBasicBlock &MBB, MachineBasicBlock::iterator It) const { |
6596 | | - MachineFunction &MF = *MBB.getParent(); |
6597 | | - const MCRegisterInfo *MRI = Subtarget.getRegisterInfo(); |
6598 | | - unsigned DwarfLR = MRI->getDwarfRegNum(ARM::LR, true); |
6599 | | - |
6600 | | - int64_t LRPosEntry = |
6601 | | - MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, DwarfLR)); |
6602 | | - BuildMI(MBB, It, DebugLoc(), get(ARM::CFI_INSTRUCTION)) |
6603 | | - .addCFIIndex(LRPosEntry) |
6604 | | - .setMIFlags(MachineInstr::FrameDestroy); |
6605 | | -} |
6606 | | - |
6607 | 6545 | void ARMBaseInstrInfo::buildOutlinedFrame( |
6608 | 6546 | MachineBasicBlock &MBB, MachineFunction &MF, |
6609 | 6547 | const outliner::OutlinedFunction &OF) const { |
@@ -6722,11 +6660,12 @@ MachineBasicBlock::iterator ARMBaseInstrInfo::insertOutlinedCall( |
6722 | 6660 | // Save and restore LR from that register. |
6723 | 6661 | copyPhysReg(MBB, It, DebugLoc(), Reg, ARM::LR, true); |
6724 | 6662 | if (!AFI.isLRSpilled()) |
6725 | | - emitCFIForLRSaveToReg(MBB, It, Reg); |
| 6663 | + CFIInstBuilder(MBB, It, MachineInstr::FrameSetup) |
| 6664 | + .buildRegister(ARM::LR, Reg); |
6726 | 6665 | CallPt = MBB.insert(It, CallMIB); |
6727 | 6666 | copyPhysReg(MBB, It, DebugLoc(), ARM::LR, Reg, true); |
6728 | 6667 | if (!AFI.isLRSpilled()) |
6729 | | - emitCFIForLRRestoreFromReg(MBB, It); |
| 6668 | + CFIInstBuilder(MBB, It, MachineInstr::FrameDestroy).buildRestore(ARM::LR); |
6730 | 6669 | It--; |
6731 | 6670 | return CallPt; |
6732 | 6671 | } |
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