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1 | | -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin \ |
2 | | -// RUN: -target-feature +avx512bf16 -emit-llvm -o - -Wall -Werror \ |
3 | | -// RUN: | FileCheck %s |
| 1 | +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bf16 -emit-llvm -o - -Wall -Werror | FileCheck %s |
| 2 | +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bf16 -emit-llvm -o - -Wall -Werror | FileCheck %s |
| 3 | +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bf16 -emit-llvm -o - -Wall -Werror | FileCheck %s |
| 4 | +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bf16 -emit-llvm -o - -Wall -Werror | FileCheck %s |
4 | 5 |
|
5 | 6 | #include <immintrin.h> |
6 | 7 |
|
7 | 8 | float test_mm_cvtsbh_ss(__bf16 A) { |
8 | | - // CHECK-LABEL: @test_mm_cvtsbh_ss |
| 9 | + // CHECK-LABEL: test_mm_cvtsbh_ss |
9 | 10 | // CHECK: fpext bfloat %{{.*}} to float |
10 | 11 | // CHECK: ret float %{{.*}} |
11 | 12 | return _mm_cvtsbh_ss(A); |
12 | 13 | } |
13 | 14 |
|
14 | 15 | __m512bh test_mm512_cvtne2ps_pbh(__m512 A, __m512 B) { |
15 | | - // CHECK-LABEL: @test_mm512_cvtne2ps_pbh |
16 | | - // CHECK: @llvm.x86.avx512bf16.cvtne2ps2bf16.512 |
17 | | - // CHECK: ret <32 x bfloat> %{{.*}} |
| 16 | + // CHECK-LABEL: test_mm512_cvtne2ps_pbh |
| 17 | + // CHECK: call {{.*}}<32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}) |
18 | 18 | return _mm512_cvtne2ps_pbh(A, B); |
19 | 19 | } |
20 | 20 |
|
21 | 21 | __m512bh test_mm512_maskz_cvtne2ps_pbh(__m512 A, __m512 B, __mmask32 U) { |
22 | | - // CHECK-LABEL: @test_mm512_maskz_cvtne2ps_pbh |
23 | | - // CHECK: @llvm.x86.avx512bf16.cvtne2ps2bf16.512 |
| 22 | + // CHECK-LABEL: test_mm512_maskz_cvtne2ps_pbh |
| 23 | + // CHECK: call {{.*}}<32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}) |
24 | 24 | // CHECK: select <32 x i1> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}} |
25 | | - // CHECK: ret <32 x bfloat> %{{.*}} |
26 | 25 | return _mm512_maskz_cvtne2ps_pbh(U, A, B); |
27 | 26 | } |
28 | 27 |
|
29 | 28 | __m512bh test_mm512_mask_cvtne2ps_pbh(__m512bh C, __mmask32 U, __m512 A, __m512 B) { |
30 | | - // CHECK-LABEL: @test_mm512_mask_cvtne2ps_pbh |
31 | | - // CHECK: @llvm.x86.avx512bf16.cvtne2ps2bf16.512 |
| 29 | + // CHECK-LABEL: test_mm512_mask_cvtne2ps_pbh |
| 30 | + // CHECK: call {{.*}}<32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}) |
32 | 31 | // CHECK: select <32 x i1> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}} |
33 | | - // CHECK: ret <32 x bfloat> %{{.*}} |
34 | 32 | return _mm512_mask_cvtne2ps_pbh(C, U, A, B); |
35 | 33 | } |
36 | 34 |
|
37 | 35 | __m256bh test_mm512_cvtneps_pbh(__m512 A) { |
38 | | - // CHECK-LABEL: @test_mm512_cvtneps_pbh |
39 | | - // CHECK: @llvm.x86.avx512bf16.cvtneps2bf16.512 |
40 | | - // CHECK: ret <16 x bfloat> %{{.*}} |
| 36 | + // CHECK-LABEL: test_mm512_cvtneps_pbh |
| 37 | + // CHECK: call {{.*}}<16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %{{.*}}) |
41 | 38 | return _mm512_cvtneps_pbh(A); |
42 | 39 | } |
43 | 40 |
|
44 | 41 | __m256bh test_mm512_mask_cvtneps_pbh(__m256bh C, __mmask16 U, __m512 A) { |
45 | | - // CHECK-LABEL: @test_mm512_mask_cvtneps_pbh |
46 | | - // CHECK: @llvm.x86.avx512bf16.cvtneps2bf16.512 |
| 42 | + // CHECK-LABEL: test_mm512_mask_cvtneps_pbh |
| 43 | + // CHECK: call {{.*}}<16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %{{.*}}) |
47 | 44 | // CHECK: select <16 x i1> %{{.*}}, <16 x bfloat> %{{.*}}, <16 x bfloat> %{{.*}} |
48 | | - // CHECK: ret <16 x bfloat> %{{.*}} |
49 | 45 | return _mm512_mask_cvtneps_pbh(C, U, A); |
50 | 46 | } |
51 | 47 |
|
52 | 48 | __m256bh test_mm512_maskz_cvtneps_pbh(__m512 A, __mmask16 U) { |
53 | | - // CHECK-LABEL: @test_mm512_maskz_cvtneps_pbh |
54 | | - // CHECK: @llvm.x86.avx512bf16.cvtneps2bf16.512 |
| 49 | + // CHECK-LABEL: test_mm512_maskz_cvtneps_pbh |
| 50 | + // CHECK: call {{.*}}<16 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %{{.*}}) |
55 | 51 | // CHECK: select <16 x i1> %{{.*}}, <16 x bfloat> %{{.*}}, <16 x bfloat> %{{.*}} |
56 | | - // CHECK: ret <16 x bfloat> %{{.*}} |
57 | 52 | return _mm512_maskz_cvtneps_pbh(U, A); |
58 | 53 | } |
59 | 54 |
|
60 | 55 | __m512 test_mm512_dpbf16_ps(__m512 D, __m512bh A, __m512bh B) { |
61 | | - // CHECK-LABEL: @test_mm512_dpbf16_ps |
62 | | - // CHECK: @llvm.x86.avx512bf16.dpbf16ps.512 |
63 | | - // CHECK: ret <16 x float> %{{.*}} |
| 56 | + // CHECK-LABEL: test_mm512_dpbf16_ps |
| 57 | + // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}}) |
64 | 58 | return _mm512_dpbf16_ps(D, A, B); |
65 | 59 | } |
66 | 60 |
|
67 | 61 | __m512 test_mm512_maskz_dpbf16_ps(__m512 D, __m512bh A, __m512bh B, __mmask16 U) { |
68 | | - // CHECK-LABEL: @test_mm512_maskz_dpbf16_ps |
69 | | - // CHECK: @llvm.x86.avx512bf16.dpbf16ps.512 |
| 62 | + // CHECK-LABEL: test_mm512_maskz_dpbf16_ps |
| 63 | + // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}}) |
70 | 64 | // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} |
71 | | - // CHECK: ret <16 x float> %{{.*}} |
72 | 65 | return _mm512_maskz_dpbf16_ps(U, D, A, B); |
73 | 66 | } |
74 | 67 |
|
75 | 68 | __m512 test_mm512_mask_dpbf16_ps(__m512 D, __m512bh A, __m512bh B, __mmask16 U) { |
76 | | - // CHECK-LABEL: @test_mm512_mask_dpbf16_ps |
77 | | - // CHECK: @llvm.x86.avx512bf16.dpbf16ps.512 |
| 69 | + // CHECK-LABEL: test_mm512_mask_dpbf16_ps |
| 70 | + // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %{{.*}}, <32 x bfloat> %{{.*}}, <32 x bfloat> %{{.*}}) |
78 | 71 | // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} |
79 | | - // CHECK: ret <16 x float> %{{.*}} |
80 | 72 | return _mm512_mask_dpbf16_ps(D, U, A, B); |
81 | 73 | } |
82 | 74 |
|
83 | 75 | __m512 test_mm512_cvtpbh_ps(__m256bh A) { |
84 | | - // CHECK-LABEL: @test_mm512_cvtpbh_ps |
| 76 | + // CHECK-LABEL: test_mm512_cvtpbh_ps |
85 | 77 | // CHECK: sext <16 x i16> %{{.*}} to <16 x i32> |
86 | | - // CHECK: @llvm.x86.avx512.pslli.d.512 |
87 | | - // CHECK: ret <16 x float> %{{.*}} |
| 78 | + // CHECK: call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %{{.*}}, i32 %{{.*}}) |
88 | 79 | return _mm512_cvtpbh_ps(A); |
89 | 80 | } |
90 | 81 |
|
91 | 82 | __m512 test_mm512_maskz_cvtpbh_ps(__mmask16 M, __m256bh A) { |
92 | | - // CHECK-LABEL: @test_mm512_maskz_cvtpbh_ps |
| 83 | + // CHECK-LABEL: test_mm512_maskz_cvtpbh_ps |
93 | 84 | // CHECK: sext <16 x i16> %{{.*}} to <16 x i32> |
94 | 85 | // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} |
95 | | - // CHECK: @llvm.x86.avx512.pslli.d.512 |
96 | | - // CHECK: ret <16 x float> %{{.*}} |
| 86 | + // CHECK: call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %{{.*}}, i32 %{{.*}}) |
97 | 87 | return _mm512_maskz_cvtpbh_ps(M, A); |
98 | 88 | } |
99 | 89 |
|
100 | 90 | __m512 test_mm512_mask_cvtpbh_ps(__m512 S, __mmask16 M, __m256bh A) { |
101 | | - // CHECK-LABEL: @test_mm512_mask_cvtpbh_ps |
| 91 | + // CHECK-LABEL: test_mm512_mask_cvtpbh_ps |
102 | 92 | // CHECK: sext <16 x i16> %{{.*}} to <16 x i32> |
103 | | - // CHECK: @llvm.x86.avx512.pslli.d.512 |
| 93 | + // CHECK: call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %{{.*}}, i32 %{{.*}}) |
104 | 94 | // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} |
105 | | - // CHECK: ret <16 x float> %{{.*}} |
106 | 95 | return _mm512_mask_cvtpbh_ps(S, M, A); |
107 | 96 | } |
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