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lines changed Original file line number Diff line number Diff line change @@ -35,6 +35,7 @@ unittest("CoreTests") {
3535 deps += [
3636 " //llvm/lib/Target/AArch64/MCTargetDesc" ,
3737 " //llvm/lib/Target/AArch64/Utils" ,
38+ " //llvm/lib/Target/AArch64:AArch64GenSDNodeInfo" ,
3839 ]
3940 }
4041 if (llvm_build_X86 ) {
Original file line number Diff line number Diff line change @@ -72,6 +72,15 @@ tablegen("AArch64GenRegisterBank") {
7272 td_file = " AArch64.td"
7373}
7474
75+ tablegen (" AArch64GenSDNodeInfo" ) {
76+ visibility = [
77+ " :LLVMAArch64CodeGen" ,
78+ " //bolt/unittests/Core:CoreTests" ,
79+ ]
80+ args = [ " -gen-sd-node-info" ]
81+ td_file = " AArch64.td"
82+ }
83+
7584static_library (" LLVMAArch64CodeGen" ) {
7685 deps = [
7786 " :AArch64GenCallingConv" ,
@@ -84,6 +93,7 @@ static_library("LLVMAArch64CodeGen") {
8493 " :AArch64GenPostLegalizeGILowering" ,
8594 " :AArch64GenPreLegalizeGICombiner" ,
8695 " :AArch64GenRegisterBank" ,
96+ " :AArch64GenSDNodeInfo" ,
8797
8898 # See https://reviews.llvm.org/D69130
8999 " AsmParser:AArch64GenAsmMatcher" ,
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