[RISCV][GISel] Add initial support for rvv intrinsics (#156415)

This pr removes the falling back to SDISel of rvv intrinsics and marks
them legalized in the legalize pass. Another pr would be created for
regbankselect pass to make vf form intriniscs have the right scalar
register bank.

Author: jacquesguan

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

@@ -722,6 +722,10 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
 bool RISCVLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
                                            MachineInstr &MI) const {
   Intrinsic::ID IntrinsicID = cast<GIntrinsic>(MI).getIntrinsicID();
+
+  if (RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(IntrinsicID))
+    return true;
+
   switch (IntrinsicID) {
   default:
     return false;

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -38,6 +38,7 @@
 #include "llvm/IR/DiagnosticPrinter.h"
 #include "llvm/IR/IRBuilder.h"
 #include "llvm/IR/Instructions.h"
+#include "llvm/IR/IntrinsicInst.h"
 #include "llvm/IR/IntrinsicsRISCV.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCInstBuilder.h"
@@ -24894,6 +24895,12 @@ bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
       Op == Instruction::Freeze || Op == Instruction::Store)
     return false;
 
+  if (auto *II = dyn_cast<IntrinsicInst>(&Inst)) {
+    // Mark RVV intrinsic as supported.
+    if (RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(II->getIntrinsicID()))
+      return false;
+  }
+
   if (Inst.getType()->isScalableTy())
     return true;
 

llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll

@@ -2,39 +2,6 @@
 ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
 ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err
 
-
-declare <vscale x 1 x i8> @llvm.riscv.vadd.nxv1i8.nxv1i8(
-  <vscale x 1 x i8>,
-  <vscale x 1 x i8>,
-  <vscale x 1 x i8>,
-  i64)
-
-; FALLBACK_WITH_REPORT_ERR:  <unknown>:0:0: unable to translate instruction: call
-; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_arg
-define <vscale x 1 x i8> @scalable_arg(<vscale x 1 x i8> %0, <vscale x 1 x i8> %1, i64 %2) nounwind {
-entry:
-  %a = call <vscale x 1 x i8> @llvm.riscv.vadd.nxv1i8.nxv1i8(
-    <vscale x 1 x i8> undef,
-    <vscale x 1 x i8> %0,
-    <vscale x 1 x i8> %1,
-    i64 %2)
-
-  ret <vscale x 1 x i8> %a
-}
-
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: call
-; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_inst
-define <vscale x 1 x i8> @scalable_inst(i64 %0) nounwind {
-entry:
-  %a = call <vscale x 1 x i8> @llvm.riscv.vadd.nxv1i8.nxv1i8(
-    <vscale x 1 x i8> undef,
-    <vscale x 1 x i8> undef,
-    <vscale x 1 x i8> undef,
-    i64 %0)
-
-  ret <vscale x 1 x i8> %a
-}
-
 ; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: alloca:
 ; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_alloca
 define void @scalable_alloca() #1 {