Skip to content

Commit 48d45a4

Browse files
joker-ephgithub-actions[bot]
authored andcommitted
Automerge: [MLIR] Migrate some conversion passes and dialects to LDBG() macro (NFC) (#151349)
2 parents 4ac65be + 75e5a70 commit 48d45a4

File tree

8 files changed

+50
-68
lines changed

8 files changed

+50
-68
lines changed

mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222
#include "mlir/Transforms/DialectConversion.h"
2323
#include "llvm/ADT/DenseMap.h"
2424
#include "llvm/ADT/TypeSwitch.h"
25-
#include "llvm/Support/Debug.h"
25+
#include "llvm/Support/DebugLog.h"
2626

2727
namespace mlir {
2828
#define GEN_PASS_DEF_CONVERTMATHTOFUNCS
@@ -32,7 +32,6 @@ namespace mlir {
3232
using namespace mlir;
3333

3434
#define DEBUG_TYPE "math-to-funcs"
35-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ")
3635

3736
namespace {
3837
// Pattern to convert vector operations to scalar operations.
@@ -653,10 +652,8 @@ FPowIOpLowering::matchAndRewrite(math::FPowIOp op,
653652
/// }
654653
static func::FuncOp createCtlzFunc(ModuleOp *module, Type elementType) {
655654
if (!isa<IntegerType>(elementType)) {
656-
LLVM_DEBUG({
657-
DBGS() << "non-integer element type for CtlzFunc; type was: ";
658-
elementType.print(llvm::dbgs());
659-
});
655+
LDBG() << "non-integer element type for CtlzFunc; type was: "
656+
<< elementType;
660657
llvm_unreachable("non-integer element type");
661658
}
662659
int64_t bitWidth = elementType.getIntOrFloatBitWidth();

mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
//===----------------------------------------------------------------------===//
88

99
#include "mlir/Conversion/MathToROCDL/MathToROCDL.h"
10+
#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
1011
#include "mlir/Conversion/LLVMCommon/LoweringOptions.h"
1112
#include "mlir/Conversion/LLVMCommon/TypeConverter.h"
1213
#include "mlir/Dialect/Func/IR/FuncOps.h"
@@ -21,7 +22,6 @@
2122

2223
#include "../GPUCommon/GPUOpsLowering.h"
2324
#include "../GPUCommon/OpToFuncCallLowering.h"
24-
#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
2525

2626
namespace mlir {
2727
#define GEN_PASS_DEF_CONVERTMATHTOROCDL
@@ -31,7 +31,6 @@ namespace mlir {
3131
using namespace mlir;
3232

3333
#define DEBUG_TYPE "math-to-rocdl"
34-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ")
3534

3635
template <typename OpTy>
3736
static void populateOpPatterns(const LLVMTypeConverter &converter,

mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,11 +24,12 @@
2424
#include "mlir/IR/BuiltinTypes.h"
2525
#include "mlir/IR/IRMapping.h"
2626
#include "mlir/Pass/Pass.h"
27+
#include "llvm/Support/DebugLog.h"
2728
#include "llvm/Support/MathExtras.h"
29+
2830
#include <optional>
2931

3032
#define DEBUG_TYPE "memref-to-llvm"
31-
#define DBGS() llvm::dbgs() << "[" DEBUG_TYPE "] "
3233

3334
namespace mlir {
3435
#define GEN_PASS_DEF_FINALIZEMEMREFTOLLVMCONVERSIONPASS
@@ -1848,8 +1849,8 @@ matchSimpleAtomicOp(memref::AtomicRMWOp atomicOp) {
18481849
return LLVM::AtomicBinOp::xchg;
18491850
case arith::AtomicRMWKind::maximumf:
18501851
// TODO: remove this by end of 2025.
1851-
LLVM_DEBUG(DBGS() << "the lowering of memref.atomicrmw maximumf changed "
1852-
"from fmax to fmaximum, expect more NaNs");
1852+
LDBG() << "the lowering of memref.atomicrmw maximumf changed "
1853+
"from fmax to fmaximum, expect more NaNs";
18531854
return LLVM::AtomicBinOp::fmaximum;
18541855
case arith::AtomicRMWKind::maxnumf:
18551856
return LLVM::AtomicBinOp::fmax;
@@ -1859,8 +1860,8 @@ matchSimpleAtomicOp(memref::AtomicRMWOp atomicOp) {
18591860
return LLVM::AtomicBinOp::umax;
18601861
case arith::AtomicRMWKind::minimumf:
18611862
// TODO: remove this by end of 2025.
1862-
LLVM_DEBUG(DBGS() << "the lowering of memref.atomicrmw minimum changed "
1863-
"from fmin to fminimum, expect more NaNs");
1863+
LDBG() << "the lowering of memref.atomicrmw minimum changed "
1864+
"from fmin to fminimum, expect more NaNs";
18641865
return LLVM::AtomicBinOp::fminimum;
18651866
case arith::AtomicRMWKind::minnumf:
18661867
return LLVM::AtomicBinOp::fmin;

mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,6 @@
3636
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
3737

3838
#define DEBUG_TYPE "shard-to-mpi"
39-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ")
4039

4140
namespace mlir {
4241
#define GEN_PASS_DEF_CONVERTSHARDTOMPIPASS

mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp

Lines changed: 29 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -31,10 +31,9 @@
3131
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
3232
#include "llvm/ADT/STLExtras.h"
3333
#include "llvm/ADT/TypeSwitch.h"
34+
#include "llvm/Support/DebugLog.h"
3435

3536
#define DEBUG_TYPE "vector-to-gpu"
36-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ")
37-
#define DBGSNL() (llvm::dbgs() << "\n")
3837

3938
namespace mlir {
4039
#define GEN_PASS_DEF_CONVERTVECTORTOGPU
@@ -366,7 +365,7 @@ static SetVector<Operation *> getOpToConvert(mlir::Operation *op,
366365
// by all operations.
367366
if (llvm::any_of(dependentOps, [useNvGpu](Operation *op) {
368367
if (!supportsMMaMatrixType(op, useNvGpu)) {
369-
LLVM_DEBUG(DBGS() << "cannot convert op: " << *op << "\n");
368+
LDBG() << "cannot convert op: " << *op;
370369
return true;
371370
}
372371
return false;
@@ -548,7 +547,7 @@ convertTransferReadOp(RewriterBase &rewriter, vector::TransferReadOp op,
548547
std::optional<int64_t> stride =
549548
getStaticallyKnownRowStride(op.getShapedType());
550549
if (!stride.has_value()) {
551-
LLVM_DEBUG(DBGS() << "no stride\n");
550+
LDBG() << "no stride";
552551
return rewriter.notifyMatchFailure(op, "no stride");
553552
}
554553

@@ -583,7 +582,7 @@ convertTransferReadOp(RewriterBase &rewriter, vector::TransferReadOp op,
583582
isTranspose ? rewriter.getUnitAttr() : UnitAttr());
584583
valueMapping[mappingResult] = load;
585584

586-
LLVM_DEBUG(DBGS() << "transfer read to: " << load << "\n");
585+
LDBG() << "transfer read to: " << load;
587586
return success();
588587
}
589588

@@ -597,13 +596,13 @@ convertTransferWriteOp(RewriterBase &rewriter, vector::TransferWriteOp op,
597596
std::optional<int64_t> stride =
598597
getStaticallyKnownRowStride(op.getShapedType());
599598
if (!stride.has_value()) {
600-
LLVM_DEBUG(DBGS() << "no stride\n");
599+
LDBG() << "no stride";
601600
return rewriter.notifyMatchFailure(op, "no stride");
602601
}
603602

604603
auto it = valueMapping.find(op.getVector());
605604
if (it == valueMapping.end()) {
606-
LLVM_DEBUG(DBGS() << "no mapping\n");
605+
LDBG() << "no mapping";
607606
return rewriter.notifyMatchFailure(op, "no mapping");
608607
}
609608

@@ -613,9 +612,9 @@ convertTransferWriteOp(RewriterBase &rewriter, vector::TransferWriteOp op,
613612
rewriter.getIndexAttr(*stride), /*transpose=*/UnitAttr());
614613
(void)store;
615614

616-
LLVM_DEBUG(DBGS() << "transfer write to: " << store << "\n");
615+
LDBG() << "transfer write to: " << store;
617616

618-
LLVM_DEBUG(DBGS() << "erase: " << op << "\n");
617+
LDBG() << "erase: " << op;
619618
rewriter.eraseOp(op);
620619
return success();
621620
}
@@ -641,21 +640,21 @@ convertConstantOpMmaSync(RewriterBase &rewriter, arith::ConstantOp op,
641640
FailureOr<nvgpu::WarpMatrixInfo> warpMatrixInfo =
642641
nvgpu::getWarpMatrixInfo(op);
643642
if (failed(warpMatrixInfo)) {
644-
LLVM_DEBUG(DBGS() << "no warpMatrixInfo\n");
643+
LDBG() << "no warpMatrixInfo";
645644
return rewriter.notifyMatchFailure(op, "no warpMatrixInfo");
646645
}
647646

648647
FailureOr<nvgpu::FragmentElementInfo> regInfo =
649648
nvgpu::getMmaSyncRegisterType(*warpMatrixInfo);
650649
if (failed(regInfo)) {
651-
LLVM_DEBUG(DBGS() << "not mma sync reg info\n");
650+
LDBG() << "not mma sync reg info";
652651
return rewriter.notifyMatchFailure(op, "not mma sync reg info");
653652
}
654653

655654
VectorType vectorType = getMmaSyncVectorOperandType(*regInfo);
656655
auto dense = dyn_cast<SplatElementsAttr>(op.getValue());
657656
if (!dense) {
658-
LLVM_DEBUG(DBGS() << "not a splat\n");
657+
LDBG() << "not a splat";
659658
return rewriter.notifyMatchFailure(op, "not a splat");
660659
}
661660

@@ -677,8 +676,8 @@ static FailureOr<bool> isTransposed(vector::TransferReadOp op) {
677676
mlir::AffineMap map = op.getPermutationMap();
678677

679678
if (map.getNumResults() != 2) {
680-
LLVM_DEBUG(DBGS() << "Failed because the result of `vector.transfer_read` "
681-
"is not a 2d operand\n");
679+
LDBG() << "Failed because the result of `vector.transfer_read` "
680+
"is not a 2d operand";
682681
return failure();
683682
}
684683

@@ -691,8 +690,8 @@ static FailureOr<bool> isTransposed(vector::TransferReadOp op) {
691690
auto exprN = dyn_cast<AffineDimExpr>(dN);
692691

693692
if (!exprM || !exprN) {
694-
LLVM_DEBUG(DBGS() << "Failed because expressions are not affine dim "
695-
"expressions, then transpose cannot be determined.\n");
693+
LDBG() << "Failed because expressions are not affine dim "
694+
"expressions, then transpose cannot be determined.";
696695
return failure();
697696
}
698697

@@ -709,20 +708,20 @@ creatLdMatrixCompatibleLoads(RewriterBase &rewriter, vector::TransferReadOp op,
709708
FailureOr<nvgpu::WarpMatrixInfo> warpMatrixInfo =
710709
nvgpu::getWarpMatrixInfo(op);
711710
if (failed(warpMatrixInfo)) {
712-
LLVM_DEBUG(DBGS() << "no warpMatrixInfo\n");
711+
LDBG() << "no warpMatrixInfo";
713712
return rewriter.notifyMatchFailure(op, "no warpMatrixInfo");
714713
}
715714

716715
FailureOr<nvgpu::FragmentElementInfo> regInfo =
717716
nvgpu::getMmaSyncRegisterType(*warpMatrixInfo);
718717
if (failed(regInfo)) {
719-
LLVM_DEBUG(DBGS() << "not mma sync reg info\n");
718+
LDBG() << "not mma sync reg info";
720719
return rewriter.notifyMatchFailure(op, "not mma sync reg info");
721720
}
722721

723722
FailureOr<bool> transpose = isTransposed(op);
724723
if (failed(transpose)) {
725-
LLVM_DEBUG(DBGS() << "failed to determine the transpose\n");
724+
LDBG() << "failed to determine the transpose";
726725
return rewriter.notifyMatchFailure(
727726
op, "Op should likely not be converted to a nvgpu.ldmatrix call.");
728727
}
@@ -731,10 +730,8 @@ creatLdMatrixCompatibleLoads(RewriterBase &rewriter, vector::TransferReadOp op,
731730
nvgpu::getLdMatrixParams(*warpMatrixInfo, *transpose);
732731

733732
if (failed(params)) {
734-
LLVM_DEBUG(
735-
DBGS()
736-
<< "failed to convert vector.transfer_read to ldmatrix. "
737-
<< "Op should likely not be converted to a nvgpu.ldmatrix call.\n");
733+
LDBG() << "failed to convert vector.transfer_read to ldmatrix. "
734+
<< "Op should likely not be converted to a nvgpu.ldmatrix call.";
738735
return rewriter.notifyMatchFailure(
739736
op, "failed to convert vector.transfer_read to ldmatrix; this op "
740737
"likely should not be converted to a nvgpu.ldmatrix call.");
@@ -745,7 +742,7 @@ creatLdMatrixCompatibleLoads(RewriterBase &rewriter, vector::TransferReadOp op,
745742
FailureOr<AffineMap> offsets =
746743
nvgpu::getLaneIdToLdMatrixMatrixCoord(rewriter, loc, *params);
747744
if (failed(offsets)) {
748-
LLVM_DEBUG(DBGS() << "no offsets\n");
745+
LDBG() << "no offsets";
749746
return rewriter.notifyMatchFailure(op, "no offsets");
750747
}
751748

@@ -934,7 +931,7 @@ convertTransferWriteToStores(RewriterBase &rewriter, vector::TransferWriteOp op,
934931
vector::StoreOp::create(rewriter, loc, el, op.getBase(), newIndices);
935932
}
936933

937-
LLVM_DEBUG(DBGS() << "erase: " << op << "\n");
934+
LDBG() << "erase: " << op;
938935
rewriter.eraseOp(op);
939936
return success();
940937
}
@@ -1132,9 +1129,9 @@ static scf::ForOp replaceForOpWithNewSignature(RewriterBase &rewriter,
11321129
loop.getNumResults())))
11331130
rewriter.replaceAllUsesWith(std::get<0>(it), std::get<1>(it));
11341131

1135-
LLVM_DEBUG(DBGS() << "newLoop now: " << newLoop << "\n");
1136-
LLVM_DEBUG(DBGS() << "stripped scf.for: " << loop << "\n");
1137-
LLVM_DEBUG(DBGS() << "erase: " << loop);
1132+
LDBG() << "newLoop now: " << newLoop;
1133+
LDBG() << "stripped scf.for: " << loop;
1134+
LDBG() << "erase: " << loop;
11381135

11391136
rewriter.eraseOp(loop);
11401137
return newLoop;
@@ -1150,7 +1147,7 @@ static LogicalResult convertForOp(RewriterBase &rewriter, scf::ForOp op,
11501147
for (const auto &operand : llvm::enumerate(op.getInitArgs())) {
11511148
auto it = valueMapping.find(operand.value());
11521149
if (it == valueMapping.end()) {
1153-
LLVM_DEBUG(DBGS() << "no value mapping for: " << operand.value() << "\n");
1150+
LDBG() << "no value mapping for: " << operand.value();
11541151
continue;
11551152
}
11561153
argMapping.push_back(std::make_pair(
@@ -1168,7 +1165,7 @@ static LogicalResult convertForOp(RewriterBase &rewriter, scf::ForOp op,
11681165
loopBody.getArgument(mapping.second + newForOp.getNumInductionVars());
11691166
}
11701167

1171-
LLVM_DEBUG(DBGS() << "scf.for to: " << newForOp << "\n");
1168+
LDBG() << "scf.for to: " << newForOp;
11721169
return success();
11731170
}
11741171

@@ -1191,7 +1188,7 @@ convertYieldOp(RewriterBase &rewriter, scf::YieldOp op,
11911188
}
11921189
scf::YieldOp::create(rewriter, op.getLoc(), yieldOperands);
11931190

1194-
LLVM_DEBUG(DBGS() << "erase: " << op << "\n");
1191+
LDBG() << "erase: " << op;
11951192
rewriter.eraseOp(op);
11961193
return success();
11971194
}
@@ -1244,7 +1241,7 @@ LogicalResult mlir::convertVectorToMMAOps(RewriterBase &rewriter,
12441241

12451242
auto globalRes = LogicalResult::success();
12461243
for (Operation *op : ops) {
1247-
LLVM_DEBUG(DBGS() << "Process op: " << *op << "\n");
1244+
LDBG() << "Process op: " << *op;
12481245
// Apparently callers do not want to early exit on failure here.
12491246
auto res = LogicalResult::success();
12501247
if (auto transferRead = dyn_cast<vector::TransferReadOp>(op)) {

mlir/lib/Dialect/Affine/IR/AffineOps.cpp

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
#include "llvm/ADT/SmallBitVector.h"
2727
#include "llvm/ADT/SmallVectorExtras.h"
2828
#include "llvm/ADT/TypeSwitch.h"
29-
#include "llvm/Support/Debug.h"
29+
#include "llvm/Support/DebugLog.h"
3030
#include "llvm/Support/LogicalResult.h"
3131
#include "llvm/Support/MathExtras.h"
3232
#include <numeric>
@@ -40,7 +40,6 @@ using llvm::divideFloorSigned;
4040
using llvm::mod;
4141

4242
#define DEBUG_TYPE "affine-ops"
43-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE << "]: ")
4443

4544
#include "mlir/Dialect/Affine/IR/AffineOpsDialect.cpp.inc"
4645

@@ -1062,12 +1061,9 @@ static LogicalResult replaceAffineMinBoundingBoxExpression(AffineMinOp minOp,
10621061
AffineMap *map,
10631062
ValueRange dims,
10641063
ValueRange syms) {
1064+
LDBG() << "replaceAffineMinBoundingBoxExpression: `" << minOp << "`";
10651065
AffineMap affineMinMap = minOp.getAffineMap();
10661066

1067-
LLVM_DEBUG({
1068-
DBGS() << "replaceAffineMinBoundingBoxExpression: `" << minOp << "`\n";
1069-
});
1070-
10711067
// Check the value is positive.
10721068
for (unsigned i = 0, e = affineMinMap.getNumResults(); i < e; ++i) {
10731069
// Compare each expression in the minimum against 0.

mlir/lib/Dialect/Shard/IR/ShardOps.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@
3838
#include <utility>
3939

4040
#define DEBUG_TYPE "shard-ops"
41-
#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE << "]: ")
4241

4342
using namespace mlir;
4443
using namespace mlir::shard;

0 commit comments

Comments
 (0)