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Automerge: [CIR] Upstream CIR codegen for vec_set x86 builtin (#169265)
Support CIR codegen for x86 builtin vec_set.
2 parents 6a441d1 + 0a03b7e commit 49803bb

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‎clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp‎

Lines changed: 20 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,21 @@ static mlir::Value emitX86MaskLogic(CIRGenBuilderTy &builder,
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ops[0].getType());
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}
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static mlir::Value emitVecInsert(CIRGenBuilderTy &builder, mlir::Location loc,
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mlir::Value vec, mlir::Value value,
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mlir::Value indexOp) {
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unsigned numElts = cast<cir::VectorType>(vec.getType()).getSize();
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uint64_t index =
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indexOp.getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue();
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index &= numElts - 1;
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cir::ConstantOp indexVal = builder.getUInt64(index, loc);
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return cir::VecInsertOp::create(builder, loc, vec, value, indexVal);
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}
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mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
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const CallExpr *expr) {
120135
if (builtinID == Builtin::BI__builtin_cpu_is) {
@@ -238,11 +253,11 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
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case X86::BI__builtin_ia32_vec_set_v32qi:
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case X86::BI__builtin_ia32_vec_set_v16hi:
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case X86::BI__builtin_ia32_vec_set_v8si:
241-
case X86::BI__builtin_ia32_vec_set_v4di:
242-
cgm.errorNYI(expr->getSourceRange(),
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std::string("unimplemented X86 builtin call: ") +
244-
getContext().BuiltinInfo.getName(builtinID));
245-
return {};
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case X86::BI__builtin_ia32_vec_set_v4di: {
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return emitVecInsert(builder, getLoc(expr->getExprLoc()), ops[0], ops[1],
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ops[2]);
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}
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case X86::BI_mm_setcsr:
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case X86::BI__builtin_ia32_ldmxcsr: {
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mlir::Location loc = getLoc(expr->getExprLoc());

‎clang/test/CIR/CodeGenBuiltins/X86/vec-set-builtins.c‎

Lines changed: 141 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,141 @@
1+
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse4.1 -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG
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#include <immintrin.h>
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typedef short __v4hi __attribute__((__vector_size__(8)));
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typedef char __v16qi __attribute__((__vector_size__(16)));
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typedef short __v8hi __attribute__((__vector_size__(16)));
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typedef int __v4si __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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typedef char __v32qi __attribute__((__vector_size__(32)));
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typedef short __v16hi __attribute__((__vector_size__(32)));
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typedef int __v8si __attribute__((__vector_size__(32)));
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typedef long long __v4di __attribute__((__vector_size__(32)));
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__v4hi test_vec_set_v4hi(__v4hi a, short b) {
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// CIR-LABEL: test_vec_set_v4hi
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// CIR: {{%.*}} = cir.const #cir.int<2> : !u64i
29+
// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<4 x !s16i>
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// LLVM-LABEL: test_vec_set_v4hi
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// LLVM: {{%.*}} = insertelement <4 x i16> {{%.*}}, i16 {{%.*}}, i64 2
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// OGCG-LABEL: test_vec_set_v4hi
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// OGCG: {{%.*}} = insertelement <4 x i16> {{%.*}}, i16 {{%.*}}, i64 2
36+
return __builtin_ia32_vec_set_v4hi(a, b, 2);
37+
}
38+
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__v16qi test_vec_set_v16qi(__v16qi a, char b) {
40+
// CIR-LABEL: test_vec_set_v16qi
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// CIR: {{%.*}} = cir.const #cir.int<5> : !u64i
42+
// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<16 x !s8i>
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// LLVM-LABEL: test_vec_set_v16qi
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// LLVM: {{%.*}} = insertelement <16 x i8> {{%.*}}, i8 {{%.*}}, i64 5
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// OGCG-LABEL: test_vec_set_v16qi
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// OGCG: {{%.*}} = insertelement <16 x i8> {{%.*}}, i8 {{%.*}}, i64 5
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return __builtin_ia32_vec_set_v16qi(a, b, 5);
50+
}
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__v8hi test_vec_set_v8hi(__v8hi a, short b) {
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// CIR-LABEL: test_vec_set_v8hi
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// CIR: {{%.*}} = cir.const #cir.int<3> : !u64i
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// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<8 x !s16i>
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// LLVM-LABEL: test_vec_set_v8hi
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// LLVM: {{%.*}} = insertelement <8 x i16> {{%.*}}, i16 {{%.*}}, i64 3
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// OGCG-LABEL: test_vec_set_v8hi
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// OGCG: {{%.*}} = insertelement <8 x i16> {{%.*}}, i16 {{%.*}}, i64 3
62+
return __builtin_ia32_vec_set_v8hi(a, b, 3);
63+
}
64+
65+
__v4si test_vec_set_v4si(__v4si a, int b) {
66+
// CIR-LABEL: test_vec_set_v4si
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// CIR: {{%.*}} = cir.const #cir.int<1> : !u64i
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// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<4 x !s32i>
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// LLVM-LABEL: test_vec_set_v4si
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// LLVM: {{%.*}} = insertelement <4 x i32> {{%.*}}, i32 {{%.*}}, i64 1
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// OGCG-LABEL: test_vec_set_v4si
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// OGCG: {{%.*}} = insertelement <4 x i32> {{%.*}}, i32 {{%.*}}, i64 1
75+
return __builtin_ia32_vec_set_v4si(a, b, 1);
76+
}
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__v2di test_vec_set_v2di(__v2di a, long long b) {
79+
// CIR-LABEL: test_vec_set_v2di
80+
// CIR: {{%.*}} = cir.const #cir.int<0> : !u64i
81+
// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<2 x !s64i>
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// LLVM-LABEL: test_vec_set_v2di
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// LLVM: {{%.*}} = insertelement <2 x i64> {{%.*}}, i64 {{%.*}}, i64 0
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// OGCG-LABEL: test_vec_set_v2di
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// OGCG: {{%.*}} = insertelement <2 x i64> {{%.*}}, i64 {{%.*}}, i64 0
88+
return __builtin_ia32_vec_set_v2di(a, b, 0);
89+
}
90+
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__v32qi test_vec_set_v32qi(__v32qi a, char b) {
92+
// CIR-LABEL: test_vec_set_v32qi
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// CIR: {{%.*}} = cir.const #cir.int<10> : !u64i
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// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<32 x !s8i>
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// LLVM-LABEL: test_vec_set_v32qi
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// LLVM: {{%.*}} = insertelement <32 x i8> {{%.*}}, i8 {{%.*}}, i64 10
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// OGCG-LABEL: test_vec_set_v32qi
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// OGCG: {{%.*}} = insertelement <32 x i8> {{%.*}}, i8 {{%.*}}, i64 10
101+
return __builtin_ia32_vec_set_v32qi(a, b, 10);
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}
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__v16hi test_vec_set_v16hi(__v16hi a, short b) {
105+
// CIR-LABEL: test_vec_set_v16hi
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// CIR: {{%.*}} = cir.const #cir.int<7> : !u64i
107+
// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<16 x !s16i>
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109+
// LLVM-LABEL: test_vec_set_v16hi
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// LLVM: {{%.*}} = insertelement <16 x i16> {{%.*}}, i16 {{%.*}}, i64 7
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// OGCG-LABEL: test_vec_set_v16hi
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// OGCG: {{%.*}} = insertelement <16 x i16> {{%.*}}, i16 {{%.*}}, i64 7
114+
return __builtin_ia32_vec_set_v16hi(a, b, 7);
115+
}
116+
117+
__v8si test_vec_set_v8si(__v8si a, int b) {
118+
// CIR-LABEL: test_vec_set_v8si
119+
// CIR: {{%.*}} = cir.const #cir.int<4> : !u64i
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// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<8 x !s32i>
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// LLVM-LABEL: test_vec_set_v8si
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// LLVM: {{%.*}} = insertelement <8 x i32> {{%.*}}, i32 {{%.*}}, i64 4
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// OGCG-LABEL: test_vec_set_v8si
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// OGCG: {{%.*}} = insertelement <8 x i32> {{%.*}}, i32 {{%.*}}, i64 4
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return __builtin_ia32_vec_set_v8si(a, b, 4);
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}
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__v4di test_vec_set_v4di(__v4di a, long long b) {
131+
// CIR-LABEL: test_vec_set_v4di
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// CIR: {{%.*}} = cir.const #cir.int<2> : !u64i
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// CIR: {{%.*}} = cir.vec.insert %{{.*}}, %{{.*}}[%{{.*}} : !u64i] : !cir.vector<4 x !s64i>
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// LLVM-LABEL: test_vec_set_v4di
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// LLVM: {{%.*}} = insertelement <4 x i64> {{%.*}}, i64 {{%.*}}, i64 2
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// OGCG-LABEL: test_vec_set_v4di
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// OGCG: {{%.*}} = insertelement <4 x i64> {{%.*}}, i64 {{%.*}}, i64 2
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return __builtin_ia32_vec_set_v4di(a, b, 2);
141+
}

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