@@ -281,33 +281,46 @@ func.func @to_elements_dead_elements(%a: vector<4xf32>) -> (f32, f32) {
281281
282282// -----
283283
284- // CHECK-LABEL: @from_elements_0d
284+ // CHECK-LABEL: @from_elements_0d_f32
285285// CHECK-SAME: %[[ARG0:.+]]: f32
286286// CHECK: %[[RETVAL:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
287287// CHECK: return %[[RETVAL]]
288- func.func @from_elements_0d (%arg0 : f32 ) -> vector <f32 > {
288+ func.func @from_elements_0d_f32 (%arg0 : f32 ) -> vector <f32 > {
289289 %0 = vector.from_elements %arg0 : vector <f32 >
290290 return %0: vector <f32 >
291291}
292292
293- // CHECK-LABEL: @from_elements_1x
293+ // CHECK-LABEL: @from_elements_1xf32
294294// CHECK-SAME: %[[ARG0:.+]]: f32
295295// CHECK: %[[RETVAL:.+]] = builtin.unrealized_conversion_cast %[[ARG0]]
296296// CHECK: return %[[RETVAL]]
297- func.func @from_elements_1x (%arg0 : f32 ) -> vector <1 xf32 > {
297+ func.func @from_elements_1xf32 (%arg0 : f32 ) -> vector <1 xf32 > {
298298 %0 = vector.from_elements %arg0 : vector <1 xf32 >
299299 return %0: vector <1 xf32 >
300300}
301301
302- // CHECK-LABEL: @from_elements_3x
302+ // CHECK-LABEL: @from_elements_3xf32
303303// CHECK-SAME: %[[ARG0:.+]]: f32, %[[ARG1:.+]]: f32, %[[ARG2:.+]]: f32
304304// CHECK: %[[RETVAL:.+]] = spirv.CompositeConstruct %[[ARG0]], %[[ARG1]], %[[ARG2]] : (f32, f32, f32) -> vector<3xf32>
305305// CHECK: return %[[RETVAL]]
306- func.func @from_elements_3x (%arg0 : f32 , %arg1 : f32 , %arg2 : f32 ) -> vector <3 xf32 > {
306+ func.func @from_elements_3xf32 (%arg0 : f32 , %arg1 : f32 , %arg2 : f32 ) -> vector <3 xf32 > {
307307 %0 = vector.from_elements %arg0 , %arg1 , %arg2 : vector <3 xf32 >
308308 return %0: vector <3 xf32 >
309309}
310310
311+ func.func @from_elements_3xi8 (%arg0 : i8 , %arg1 : i8 , %arg2 : i8 ) -> vector <3 xi8 > {
312+ %0 = vector.from_elements %arg0 , %arg1 , %arg2 : vector <3 xi8 >
313+ return %0: vector <3 xi8 >
314+ }
315+ // CHECK-LABEL: @from_elements_3xi8
316+ // CHECK-SAME: %[[ARG0:.+]]: i8, %[[ARG1:.+]]: i8, %[[ARG2:.+]]: i8
317+ // CHECK-DAG: %[[CAST0:.*]] = builtin.unrealized_conversion_cast %[[ARG0]] : i8 to i32
318+ // CHECK-DAG: %[[CAST1:.*]] = builtin.unrealized_conversion_cast %[[ARG1]] : i8 to i32
319+ // CHECK-DAG: %[[CAST2:.*]] = builtin.unrealized_conversion_cast %[[ARG2]] : i8 to i32
320+ // CHECK: %[[VAL:.+]] = spirv.CompositeConstruct %[[CAST0]], %[[CAST1]], %[[CAST2]] : (i32, i32, i32) -> vector<3xi32>
321+ // CHECK: %[[RETVAL:.*]] = builtin.unrealized_conversion_cast %[[VAL]] : vector<3xi32> to vector<3xi8>
322+ // CHECK: return %[[RETVAL]]
323+
311324// -----
312325
313326// CHECK-LABEL: @insert
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