@@ -1266,98 +1266,98 @@ void test_builtin_elementwise_fshl(long long int i1, long long int i2,
12661266 u4 tmp_vu_r = __builtin_elementwise_fshr (vu1 , vu2 , vu3 );
12671267}
12681268
1269- void test_builtin_elementwise_ctlz (si8 vs1 , si8 vs2 , u4 vu1 ,
1269+ void test_builtin_elementwise_clzg (si8 vs1 , si8 vs2 , u4 vu1 ,
12701270 long long int lli , short si ,
12711271 _BitInt (31 ) bi , int i ,
12721272 char ci ) {
12731273 // CHECK: [[V8S1:%.+]] = load <8 x i16>, ptr %vs1.addr
12741274 // CHECK-NEXT: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> [[V8S1]], i1 true)
1275- vs1 = __builtin_elementwise_ctlz (vs1 );
1275+ vs1 = __builtin_elementwise_clzg (vs1 );
12761276
12771277 // CHECK: [[V8S1:%.+]] = load <8 x i16>, ptr %vs1.addr
12781278 // CHECK-NEXT: [[CLZ:%.+]] = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> [[V8S1]], i1 true)
12791279 // CHECK-NEXT: [[ISZERO:%.+]] = icmp eq <8 x i16> [[V8S1]], zeroinitializer
12801280 // CHECK-NEXT: [[V8S2:%.+]] = load <8 x i16>, ptr %vs2.addr
12811281 // select <8 x i1> [[ISZERO]], <8 x i16> [[CLZ]], <8 x i16> [[V8S2]]
1282- vs1 = __builtin_elementwise_ctlz (vs1 , vs2 );
1282+ vs1 = __builtin_elementwise_clzg (vs1 , vs2 );
12831283
12841284 // CHECK: [[V4U1:%.+]] = load <4 x i32>, ptr %vu1.addr
12851285 // CHECK-NEXT: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[V4U1]], i1 true)
1286- vu1 = __builtin_elementwise_ctlz (vu1 );
1286+ vu1 = __builtin_elementwise_clzg (vu1 );
12871287
12881288 // CHECK: [[LLI:%.+]] = load i64, ptr %lli.addr
12891289 // CHECK-NEXT: call i64 @llvm.ctlz.i64(i64 [[LLI]], i1 true)
1290- lli = __builtin_elementwise_ctlz (lli );
1290+ lli = __builtin_elementwise_clzg (lli );
12911291
12921292 // CHECK: [[SI:%.+]] = load i16, ptr %si.addr
12931293 // CHECK-NEXT: call i16 @llvm.ctlz.i16(i16 [[SI]], i1 true)
1294- si = __builtin_elementwise_ctlz (si );
1294+ si = __builtin_elementwise_clzg (si );
12951295
12961296 // CHECK: [[BI1:%.+]] = load i32, ptr %bi.addr
12971297 // CHECK-NEXT: [[BI2:%.+]] = trunc i32 [[BI1]] to i31
12981298 // CHECK-NEXT: call i31 @llvm.ctlz.i31(i31 [[BI2]], i1 true)
1299- bi = __builtin_elementwise_ctlz (bi );
1299+ bi = __builtin_elementwise_clzg (bi );
13001300
13011301 // CHECK: [[BI1:%.+]] = load i32, ptr %bi.addr
13021302 // CHECK-NEXT: [[BI2:%.+]] = trunc i32 [[BI1]] to i31
13031303 // CHECK-NEXT: [[CLZ:%.+]] = call i31 @llvm.ctlz.i31(i31 [[BI2]], i1 true)
13041304 // CHECK-NEXT: [[ISZERO:%.+]] = icmp eq i31 [[BI2]], 0
13051305 // CHECK-NEXT: select i1 [[ISZERO]], i31 1, i31 [[CLZ]]
1306- bi = __builtin_elementwise_ctlz (bi , (_BitInt (31 ))1 );
1306+ bi = __builtin_elementwise_clzg (bi , (_BitInt (31 ))1 );
13071307
13081308 // CHECK: [[I:%.+]] = load i32, ptr %i.addr
13091309 // CHECK-NEXT: call i32 @llvm.ctlz.i32(i32 [[I]], i1 true)
1310- i = __builtin_elementwise_ctlz (i );
1310+ i = __builtin_elementwise_clzg (i );
13111311
13121312 // CHECK: [[CI:%.+]] = load i8, ptr %ci.addr
13131313 // CHECK-NEXT: call i8 @llvm.ctlz.i8(i8 [[CI]], i1 true)
1314- ci = __builtin_elementwise_ctlz (ci );
1314+ ci = __builtin_elementwise_clzg (ci );
13151315}
13161316
1317- void test_builtin_elementwise_cttz (si8 vs1 , si8 vs2 , u4 vu1 ,
1317+ void test_builtin_elementwise_ctzg (si8 vs1 , si8 vs2 , u4 vu1 ,
13181318 long long int lli , short si ,
13191319 _BitInt (31 ) bi , int i ,
13201320 char ci ) {
13211321 // CHECK: [[V8S1:%.+]] = load <8 x i16>, ptr %vs1.addr
13221322 // CHECK-NEXT: call <8 x i16> @llvm.cttz.v8i16(<8 x i16> [[V8S1]], i1 true)
1323- vs1 = __builtin_elementwise_cttz (vs1 );
1323+ vs1 = __builtin_elementwise_ctzg (vs1 );
13241324
13251325 // CHECK: [[V8S1:%.+]] = load <8 x i16>, ptr %vs1.addr
13261326 // CHECK-NEXT: [[ctz:%.+]] = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> [[V8S1]], i1 true)
13271327 // CHECK-NEXT: [[ISZERO:%.+]] = icmp eq <8 x i16> [[V8S1]], zeroinitializer
13281328 // CHECK-NEXT: [[V8S2:%.+]] = load <8 x i16>, ptr %vs2.addr
13291329 // select <8 x i1> [[ISZERO]], <8 x i16> [[ctz]], <8 x i16> [[V8S2]]
1330- vs1 = __builtin_elementwise_cttz (vs1 , vs2 );
1330+ vs1 = __builtin_elementwise_ctzg (vs1 , vs2 );
13311331
13321332 // CHECK: [[V4U1:%.+]] = load <4 x i32>, ptr %vu1.addr
13331333 // CHECK-NEXT: call <4 x i32> @llvm.cttz.v4i32(<4 x i32> [[V4U1]], i1 true)
1334- vu1 = __builtin_elementwise_cttz (vu1 );
1334+ vu1 = __builtin_elementwise_ctzg (vu1 );
13351335
13361336 // CHECK: [[LLI:%.+]] = load i64, ptr %lli.addr
13371337 // CHECK-NEXT: call i64 @llvm.cttz.i64(i64 [[LLI]], i1 true)
1338- lli = __builtin_elementwise_cttz (lli );
1338+ lli = __builtin_elementwise_ctzg (lli );
13391339
13401340 // CHECK: [[SI:%.+]] = load i16, ptr %si.addr
13411341 // CHECK-NEXT: call i16 @llvm.cttz.i16(i16 [[SI]], i1 true)
1342- si = __builtin_elementwise_cttz (si );
1342+ si = __builtin_elementwise_ctzg (si );
13431343
13441344 // CHECK: [[BI1:%.+]] = load i32, ptr %bi.addr
13451345 // CHECK-NEXT: [[BI2:%.+]] = trunc i32 [[BI1]] to i31
13461346 // CHECK-NEXT: call i31 @llvm.cttz.i31(i31 [[BI2]], i1 true)
1347- bi = __builtin_elementwise_cttz (bi );
1347+ bi = __builtin_elementwise_ctzg (bi );
13481348
13491349 // CHECK: [[BI1:%.+]] = load i32, ptr %bi.addr
13501350 // CHECK-NEXT: [[BI2:%.+]] = trunc i32 [[BI1]] to i31
13511351 // CHECK-NEXT: [[ctz:%.+]] = call i31 @llvm.cttz.i31(i31 [[BI2]], i1 true)
13521352 // CHECK-NEXT: [[ISZERO:%.+]] = icmp eq i31 [[BI2]], 0
13531353 // CHECK-NEXT: select i1 [[ISZERO]], i31 1, i31 [[ctz]]
1354- bi = __builtin_elementwise_cttz (bi , (_BitInt (31 ))1 );
1354+ bi = __builtin_elementwise_ctzg (bi , (_BitInt (31 ))1 );
13551355
13561356 // CHECK: [[I:%.+]] = load i32, ptr %i.addr
13571357 // CHECK-NEXT: call i32 @llvm.cttz.i32(i32 [[I]], i1 true)
1358- i = __builtin_elementwise_cttz (i );
1358+ i = __builtin_elementwise_ctzg (i );
13591359
13601360 // CHECK: [[CI:%.+]] = load i8, ptr %ci.addr
13611361 // CHECK-NEXT: call i8 @llvm.cttz.i8(i8 [[CI]], i1 true)
1362- ci = __builtin_elementwise_cttz (ci );
1362+ ci = __builtin_elementwise_ctzg (ci );
13631363}
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