11// RUN: %clang_cc1 -fopenacc -Wno-openacc-self-if-potential-conflict -emit-cir -fclangir %s -o - | FileCheck %s
2+ // FIXME: We should run this against Windows mangling as well at one point.
23
34#pragma acc routine seq bind("BIND1")
45void Func1 (){}
@@ -18,22 +19,126 @@ void Func5(){}
1819void Func6 (){}
1920#pragma acc routine(Func6) seq device_type(radeon) bind("BIND6_R") device_type(multicore, host) bind("BIND6_M")
2021
21- // CHECK: cir.func{{.*}} @[[F1_NAME:.*Func1[^\(]*]]({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F1_R_NAME:.*]]]>}
22- // CHECK: acc.routine @[[F1_R_NAME]] func(@[[F1_NAME]]) bind("BIND1") seq
22+ #pragma acc routine seq bind(BIND7)
23+ void Func7 (int ){}
24+
25+ void Func8 (float ){}
26+ #pragma acc routine(Func8) seq bind(BIND8)
27+
28+ #pragma acc routine seq device_type(nvidia) bind(BIND9)
29+ void Func9 (int , float , short ){}
30+
31+ struct S {};
32+ struct U {};
33+ struct V {};
34+
35+ void Func10 (S){}
36+ #pragma acc routine(Func10) seq device_type(radeon) bind(BIND10)
37+
38+ #pragma acc routine seq device_type(nvidia, host) bind(BIND11_NVH) device_type(multicore) bind(BIND11_MC)
39+ void Func11 (U*, V&, int ){}
40+
41+ int Func12 (U, V, int ){ return 0 ; }
42+ #pragma acc routine(Func12) seq device_type(radeon) bind(BIND12_R) device_type(multicore, host) bind(BIND12_MCH)
43+
44+ struct HasFuncs {
45+ #pragma acc routine seq bind(MEM)
46+ int MemFunc (int , double , HasFuncs&, S){ return 0 ; }
47+ #pragma acc routine seq bind(MEM)
48+ int ConstMemFunc (int , double , HasFuncs&, S) const { return 0 ; }
49+ #pragma acc routine seq bind(MEM)
50+ int VolatileMemFunc (int , double , HasFuncs&, S) const volatile { return 0 ; }
51+ #pragma acc routine seq bind(MEM)
52+ int RefMemFunc (int , double , HasFuncs&, S) const && { return 0 ; }
53+ #pragma acc routine seq bind(STATICMEM)
54+ int StaticMemFunc (int , double , HasFuncs&, U*){ return 0 ; }
55+ };
56+
57+ void hasLambdas () {
58+ HasFuncs hf;
59+ hf.MemFunc (1 , 1.0 , hf, S{});
60+ hf.ConstMemFunc (1 , 1.0 , hf, S{});
61+ static_cast <const volatile HasFuncs>(hf).VolatileMemFunc (1 , 1.0 , hf, S{});
62+ HasFuncs{}.RefMemFunc (1 , 1.0 , hf, S{});
63+ U u;
64+ hf.StaticMemFunc (1 , 1.0 , hf, &u);
65+ int i, j, k, l;
66+ #pragma acc routine seq bind(LAMBDA1)
67+ auto Lambda = [](int , float , double ){};
68+ #pragma acc routine seq bind(LAMBDA2)
69+ auto Lambda2 = [i, F =&j, k, &l](int , float , double ){};
70+
71+ Lambda (1 , 2 , 3 );
72+ Lambda2 (1 , 2 , 3 );
73+ }
74+
75+ // CHECK: cir.func{{.*}} @_Z5Func1v({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F1_R_NAME:.*]]]>}
76+ // CHECK: acc.routine @[[F1_R_NAME]] func(@_Z5Func1v) bind("BIND1") seq
2377//
24- // CHECK: cir.func{{.*}} @[[F2_NAME:.*Func2[^\(]*]] ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F2_R_NAME:.*]]]>}
78+ // CHECK: cir.func{{.*}} @_Z5Func2v ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F2_R_NAME:.*]]]>}
2579//
26- // CHECK: cir.func{{.*}} @[[F3_NAME:.*Func3[^\(]*]] ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F3_R_NAME:.*]]]>}
27- // CHECK: acc.routine @[[F3_R_NAME]] func(@[[F3_NAME]] ) bind("BIND3" [#acc.device_type<nvidia>]) seq
80+ // CHECK: cir.func{{.*}} @_Z5Func3v ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F3_R_NAME:.*]]]>}
81+ // CHECK: acc.routine @[[F3_R_NAME]] func(@_Z5Func3v ) bind("BIND3" [#acc.device_type<nvidia>]) seq
2882//
29- // CHECK: cir.func{{.*}} @[[F4_NAME:.*Func4[^\(]*]] ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F4_R_NAME:.*]]]>}
83+ // CHECK: cir.func{{.*}} @_Z5Func4v ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F4_R_NAME:.*]]]>}
3084//
31- // CHECK: cir.func{{.*}} @[[F5_NAME:.*Func5[^\(]*]] ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F5_R_NAME:.*]]]>}
32- // CHECK: acc.routine @[[F5_R_NAME]] func(@[[F5_NAME]] ) bind("BIND5_N" [#acc.device_type<nvidia>], "BIND5_N" [#acc.device_type<host>], "BIND5_M" [#acc.device_type<multicore>]) seq
85+ // CHECK: cir.func{{.*}} @_Z5Func5v ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F5_R_NAME:.*]]]>}
86+ // CHECK: acc.routine @[[F5_R_NAME]] func(@_Z5Func5v ) bind("BIND5_N" [#acc.device_type<nvidia>], "BIND5_N" [#acc.device_type<host>], "BIND5_M" [#acc.device_type<multicore>]) seq
3387//
34- // CHECK: cir.func{{.*}} @[[F6_NAME:.*Func6[^\(]*]] ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F6_R_NAME:.*]]]>}
88+ // CHECK: cir.func{{.*}} @_Z5Func6v ({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F6_R_NAME:.*]]]>}
3589//
36- // CHECK: acc.routine @[[F2_R_NAME]] func(@[[F2_NAME]]) bind("BIND2") seq
37- // CHECK: acc.routine @[[F4_R_NAME]] func(@[[F4_NAME]]) bind("BIND4" [#acc.device_type<radeon>]) seq
38- // CHECK: acc.routine @[[F6_R_NAME]] func(@[[F6_NAME]]) bind("BIND6_R" [#acc.device_type<radeon>], "BIND6_M" [#acc.device_type<multicore>], "BIND6_M" [#acc.device_type<host>]) seq
90+ // CHECK: cir.func{{.*}} @_Z5Func7i({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F7_R_NAME:.*]]]>}
91+ // CHECK: acc.routine @[[F7_R_NAME]] func(@_Z5Func7i) bind(@_Z5BIND7i) seq
92+ //
93+ // CHECK: cir.func{{.*}} @_Z5Func8f({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F8_R_NAME:.*]]]>}
94+ //
95+ // CHECK: cir.func{{.*}} @_Z5Func9ifs({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F9_R_NAME:.*]]]>}
96+ // CHECK: acc.routine @[[F9_R_NAME]] func(@_Z5Func9ifs) bind(@_Z5BIND9ifs [#acc.device_type<nvidia>]) seq
97+
98+ // CHECK: cir.func{{.*}} @_Z6Func101S({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F10_R_NAME:.*]]]>}
99+ //
100+ // CHECK: cir.func{{.*}} @_Z6Func11P1UR1Vi({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F11_R_NAME:.*]]]>}
101+ // CHECK: acc.routine @[[F11_R_NAME]] func(@_Z6Func11P1UR1Vi) bind(@_Z10BIND11_NVHP1UR1Vi [#acc.device_type<nvidia>], @_Z10BIND11_NVHP1UR1Vi [#acc.device_type<host>], @_Z9BIND11_MCP1UR1Vi [#acc.device_type<multicore>]) seq
102+ //
103+ // CHECK: cir.func{{.*}} @_Z6Func121U1Vi({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[F12_R_NAME:.*]]]>}
104+ //
105+ // CHECK: cir.func{{.*}} @_ZN8HasFuncs7MemFuncEidRS_1S({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[MEMFUNC_R_NAME:.*]]]>}
106+ //
107+ // CHECK: cir.func{{.*}} @_ZNK8HasFuncs12ConstMemFuncEidRS_1S({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[CONSTMEMFUNC_R_NAME:.*]]]>}
108+ //
109+ // CHECK: cir.func{{.*}} @_ZNVK8HasFuncs15VolatileMemFuncEidRS_1S({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[VOLATILEMEMFUNC_R_NAME:.*]]]>}
110+ //
111+ // CHECK: cir.func{{.*}} @_ZNKO8HasFuncs10RefMemFuncEidRS_1S({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[REFMEMFUNC_R_NAME:.*]]]>}
112+ //
113+ // CHECK: cir.func{{.*}} @_ZN8HasFuncs13StaticMemFuncEidRS_P1U({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[STATICFUNC_R_NAME:.*]]]>}
114+ //
115+ // CHECK: cir.func{{.*}} lambda{{.*}} @_ZZ10hasLambdasvENK3$_0clEifd({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[LAMBDA1_R_NAME:.*]]]>}
116+ //
117+ // CHECK: cir.func{{.*}} lambda{{.*}} @_ZZ10hasLambdasvENK3$_1clEifd({{.*}}){{.*}} attributes {acc.routine_info = #acc.routine_info<[@[[LAMBDA2_R_NAME:.*]]]>}
118+ //
119+ // CHECK: acc.routine @[[MEMFUNC_R_NAME]] func(@_ZN8HasFuncs7MemFuncEidRS_1S) bind(@_Z3MEMP8HasFuncsidRS_1S) seq
120+ // CHECK: acc.routine @[[CONSTMEMFUNC_R_NAME]] func(@_ZNK8HasFuncs12ConstMemFuncEidRS_1S) bind(@_Z3MEMPK8HasFuncsidRS_1S) seq
121+ // CHECK: acc.routine @[[VOLATILEMEMFUNC_R_NAME]] func(@_ZNVK8HasFuncs15VolatileMemFuncEidRS_1S) bind(@_Z3MEMPVK8HasFuncsidRS_1S) seq
122+ // CHECK: acc.routine @[[REFMEMFUNC_R_NAME]] func(@_ZNKO8HasFuncs10RefMemFuncEidRS_1S) bind(@_Z3MEMPK8HasFuncsidRS_1S) seq
123+ // CHECK: acc.routine @[[STATICFUNC_R_NAME]] func(@_ZN8HasFuncs13StaticMemFuncEidRS_P1U) bind(@_Z9STATICMEMP8HasFuncsidRS_P1U) seq
124+ //
125+ // These two LOOK weird because the first argument to each of these is the
126+ // implicit 'this', so they look like they have the lambda mangling (and
127+ // demanglers don't handle lambdas well).
128+ // CHECK: acc.routine @[[LAMBDA1_R_NAME]] func(@_ZZ10hasLambdasvENK3$_0clEifd) bind(@_Z7LAMBDA1PKZ10hasLambdasvE3$_0ifd) seq
129+ // Manual demangle:
130+ // Func name: _Z7LAMBDA1 -> LAMBDA1
131+ // Args: P -> Pointer
132+ // K -> Const
133+ // Z10hasLambdasv-> hasLambdas(void)::
134+ // E3$_0 -> anonymous type #0
135+ // ifd -> taking args int, float, double.
136+ // // CHECK: acc.routine @[[LAMBDA2_R_NAME]] func(@_ZZ10hasLambdasvENK3$_1clEifd) bind(@_Z7LAMBDA2PKZ10hasLambdasvE3$_1ifd) seq
137+
138+ // CHECK: acc.routine @[[F2_R_NAME]] func(@_Z5Func2v) bind("BIND2") seq
139+ // CHECK: acc.routine @[[F4_R_NAME]] func(@_Z5Func4v) bind("BIND4" [#acc.device_type<radeon>]) seq
140+ // CHECK: acc.routine @[[F6_R_NAME]] func(@_Z5Func6v) bind("BIND6_R" [#acc.device_type<radeon>], "BIND6_M" [#acc.device_type<multicore>], "BIND6_M" [#acc.device_type<host>]) seq
141+ // CHECK: acc.routine @[[F8_R_NAME]] func(@_Z5Func8f) bind(@_Z5BIND8f) seq
142+ // CHECK: acc.routine @[[F10_R_NAME]] func(@_Z6Func101S) bind(@_Z6BIND101S [#acc.device_type<radeon>]) seq
143+ // CHECK: acc.routine @[[F12_R_NAME]] func(@_Z6Func121U1Vi) bind(@_Z8BIND12_R1U1Vi [#acc.device_type<radeon>], @_Z10BIND12_MCH1U1Vi [#acc.device_type<multicore>], @_Z10BIND12_MCH1U1Vi [#acc.device_type<host>]) seq
39144
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