[IR] Fix a few implicit conversions from TypeSize to uint64_t. NFC (#159894)

Author: topperc

llvm/include/llvm/Analysis/MemoryLocation.h

@@ -146,7 +146,8 @@ class LocationSize {
     if (isScalable() || Other.isScalable())
       return afterPointer();
 
-    return upperBound(std::max(getValue(), Other.getValue()));
+    return upperBound(
+        std::max(getValue().getFixedValue(), Other.getValue().getFixedValue()));
   }
 
   bool hasValue() const {

llvm/include/llvm/CodeGenTypes/MachineValueType.h

@@ -202,7 +202,7 @@ namespace llvm {
     /// bitwidth.
     MVT changeVectorElementTypeToInteger() const {
       MVT EltTy = getVectorElementType();
-      MVT IntTy = MVT::getIntegerVT(EltTy.getSizeInBits());
+      MVT IntTy = MVT::getIntegerVT(EltTy.getFixedSizeInBits());
       MVT VecTy = MVT::getVectorVT(IntTy, getVectorElementCount());
       assert(VecTy.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE &&
              "Simple vector VT not representable by simple integer vector VT!");
@@ -224,7 +224,7 @@ namespace llvm {
     MVT changeTypeToInteger() {
       if (isVector())
         return changeVectorElementTypeToInteger();
-      return MVT::getIntegerVT(getSizeInBits());
+      return MVT::getIntegerVT(getFixedSizeInBits());
     }
 
     /// Return a VT for a vector type with the same element type but

llvm/include/llvm/IR/DerivedTypes.h

@@ -479,7 +479,8 @@ class VectorType : public Type {
   /// the input type, and the element type is an integer type of the same width
   /// as the input element type.
   static VectorType *getInteger(VectorType *VTy) {
-    unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits();
+    unsigned EltBits =
+        VTy->getElementType()->getPrimitiveSizeInBits().getFixedValue();
     assert(EltBits && "Element size must be of a non-zero size");
     Type *EltTy = IntegerType::get(VTy->getContext(), EltBits);
     return VectorType::get(EltTy, VTy->getElementCount());
@@ -510,7 +511,8 @@ class VectorType : public Type {
         llvm_unreachable("Cannot create narrower fp vector element type");
       }
     } else {
-      unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits();
+      unsigned EltBits =
+          VTy->getElementType()->getPrimitiveSizeInBits().getFixedValue();
       assert((EltBits & 1) == 0 &&
              "Cannot truncate vector element with odd bit-width");
       EltTy = IntegerType::get(VTy->getContext(), EltBits / 2);

llvm/lib/IR/Constants.cpp

@@ -2864,7 +2864,7 @@ uint64_t ConstantDataSequential::getNumElements() const {
 }
 
 uint64_t ConstantDataSequential::getElementByteSize() const {
-  return getElementType()->getPrimitiveSizeInBits() / 8;
+  return getElementType()->getPrimitiveSizeInBits().getFixedValue() / 8;
 }
 
 /// Return the start of the specified element.

llvm/lib/IR/Instructions.cpp

@@ -3234,8 +3234,12 @@ CastInst::getCastOpcode(
       }
 
   // Get the bit sizes, we'll need these
-  unsigned SrcBits = SrcTy->getPrimitiveSizeInBits();   // 0 for ptr
-  unsigned DestBits = DestTy->getPrimitiveSizeInBits(); // 0 for ptr
+  // FIXME: This doesn't work for scalable vector types with different element
+  // counts that don't call getElementType above.
+  unsigned SrcBits =
+      SrcTy->getPrimitiveSizeInBits().getFixedValue(); // 0 for ptr
+  unsigned DestBits =
+      DestTy->getPrimitiveSizeInBits().getFixedValue(); // 0 for ptr
 
   // Run through the possibilities ...
   if (DestTy->isIntegerTy()) {                      // Casting to integral

llvm/lib/IR/Verifier.cpp

@@ -4411,7 +4411,7 @@ void Verifier::visitNoaliasAddrspaceMetadata(Instruction &I, MDNode *Range,
 }
 
 void Verifier::checkAtomicMemAccessSize(Type *Ty, const Instruction *I) {
-  unsigned Size = DL.getTypeSizeInBits(Ty);
+  unsigned Size = DL.getTypeSizeInBits(Ty).getFixedValue();
   Check(Size >= 8, "atomic memory access' size must be byte-sized", Ty, I);
   Check(!(Size & (Size - 1)),
         "atomic memory access' operand must have a power-of-two size", Ty, I);

llvm/lib/Transforms/Utils/Local.cpp

@@ -2435,8 +2435,8 @@ bool llvm::replaceAllDbgUsesWith(Instruction &From, Value &To,
   // Handle integer-to-integer widening and narrowing.
   // FIXME: Use DW_OP_convert when it's available everywhere.
   if (FromTy->isIntegerTy() && ToTy->isIntegerTy()) {
-    uint64_t FromBits = FromTy->getPrimitiveSizeInBits();
-    uint64_t ToBits = ToTy->getPrimitiveSizeInBits();
+    uint64_t FromBits = FromTy->getIntegerBitWidth();
+    uint64_t ToBits = ToTy->getIntegerBitWidth();
     assert(FromBits != ToBits && "Unexpected no-op conversion");
 
     // When the width of the result grows, assume that a debugger will only

llvm/utils/TableGen/Common/DAGISelMatcher.h

@@ -838,8 +838,9 @@ class EmitIntegerMatcher : public Matcher {
 
 public:
   EmitIntegerMatcher(int64_t val, MVT::SimpleValueType vt, unsigned resultNo)
-      : Matcher(EmitInteger), Val(SignExtend64(val, MVT(vt).getSizeInBits())),
-        VT(vt), ResultNo(resultNo) {}
+      : Matcher(EmitInteger),
+        Val(SignExtend64(val, MVT(vt).getFixedSizeInBits())), VT(vt),
+        ResultNo(resultNo) {}
 
   int64_t getValue() const { return Val; }
   MVT::SimpleValueType getVT() const { return VT; }