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1 parent e99ca74 commit 6c6413fCopy full SHA for 6c6413f
llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
@@ -2611,8 +2611,8 @@ void GICombinerEmitter::emitTestSimplePredicate(raw_ostream &OS) {
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// (GICXXPred_Invalid + 1).
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unsigned ExpectedID = 0;
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for (const auto &ID : keys(AllCombineRules)) {
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- ++ExpectedID;
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assert(ExpectedID == ID && "combine rules are not ordered!");
+ ++ExpectedID;
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OS << " " << getIsEnabledPredicateEnumName(ID) << EnumeratorSeparator;
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EnumeratorSeparator = ",\n";
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}
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