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Automerge: MCAsmBackend,Hexagon: Remove MCRelaxableFragment from fixupNeedsRelaxationAdvanced
Among fixupNeedsRelaxationAdvanced (introduced by https://reviews.llvm.org/D8217) targets, only Hexagon needs the `MCRelaxableFragment` parameter (commit 86f218e) to get the instruction packet (MCInst with sub-instruction operands). As fixupNeedsRelaxationAdvanced follows mayNeedRelaxation, we can store the MCInst in mayNeedRelaxation and eliminate the MCRelaxableFragment parameter. Follow-up to 7c83b7e that eliminates the MCRelaxableFragment parameter from fixupNeedsRelaxation.
2 parents cbaab0b + 2ff226a commit 8f1399e

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11 files changed

+25
-22
lines changed

11 files changed

+25
-22
lines changed

‎llvm/include/llvm/MC/MCAsmBackend.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,6 @@ class MCAsmBackend {
153153
/// Target specific predicate for whether a given fixup requires the
154154
/// associated instruction to be relaxed.
155155
virtual bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
156-
const MCRelaxableFragment &,
157156
const MCFixup &, const MCValue &,
158157
uint64_t, bool Resolved) const;
159158

‎llvm/lib/MC/MCAsmBackend.cpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,6 @@ bool MCAsmBackend::shouldForceRelocation(const MCAssembler &, const MCFixup &,
116116
}
117117

118118
bool MCAsmBackend::fixupNeedsRelaxationAdvanced(const MCAssembler &,
119-
const MCRelaxableFragment &,
120119
const MCFixup &Fixup,
121120
const MCValue &, uint64_t Value,
122121
bool Resolved) const {

‎llvm/lib/MC/MCAssembler.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -999,8 +999,8 @@ bool MCAssembler::fixupNeedsRelaxation(const MCFixup &Fixup,
999999
uint64_t Value;
10001000
bool Resolved = evaluateFixup(Fixup, DF, Target, DF->getSubtargetInfo(),
10011001
Value, /*RecordReloc=*/false);
1002-
return getBackend().fixupNeedsRelaxationAdvanced(*this, *DF, Fixup, Target,
1003-
Value, Resolved);
1002+
return getBackend().fixupNeedsRelaxationAdvanced(*this, Fixup, Target, Value,
1003+
Resolved);
10041004
}
10051005

10061006
bool MCAssembler::fragmentNeedsRelaxation(const MCRelaxableFragment *F) const {

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -354,9 +354,11 @@ static bool needsInterworking(const MCAssembler &Asm, const MCSymbol *Sym,
354354
return false;
355355
}
356356

357-
bool ARMAsmBackend::fixupNeedsRelaxationAdvanced(
358-
const MCAssembler &Asm, const MCRelaxableFragment &, const MCFixup &Fixup,
359-
const MCValue &Target, uint64_t Value, bool Resolved) const {
357+
bool ARMAsmBackend::fixupNeedsRelaxationAdvanced(const MCAssembler &Asm,
358+
const MCFixup &Fixup,
359+
const MCValue &Target,
360+
uint64_t Value,
361+
bool Resolved) const {
360362
const MCSymbol *Sym = Target.getAddSym();
361363
if (needsInterworking(Asm, Sym, Fixup.getTargetKind()))
362364
return true;

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,6 @@ class ARMAsmBackend : public MCAsmBackend {
5555
uint64_t Value) const;
5656

5757
bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
58-
const MCRelaxableFragment &,
5958
const MCFixup &, const MCValue &, uint64_t,
6059
bool) const override;
6160

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -171,9 +171,11 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
171171
}
172172
}
173173

174-
bool CSKYAsmBackend::fixupNeedsRelaxationAdvanced(
175-
const MCAssembler &, const MCRelaxableFragment &, const MCFixup &Fixup,
176-
const MCValue &, uint64_t Value, bool Resolved) const {
174+
bool CSKYAsmBackend::fixupNeedsRelaxationAdvanced(const MCAssembler &,
175+
const MCFixup &Fixup,
176+
const MCValue &,
177+
uint64_t Value,
178+
bool Resolved) const {
177179
// Return true if the symbol is unresolved.
178180
if (!Resolved)
179181
return true;

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,6 @@ class CSKYAsmBackend : public MCAsmBackend {
4040
const MCSubtargetInfo &STI) const override;
4141

4242
bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
43-
const MCRelaxableFragment &,
4443
const MCFixup &, const MCValue &, uint64_t,
4544
bool) const override;
4645

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ class HexagonAsmBackend : public MCAsmBackend {
4141
uint8_t OSABI;
4242
StringRef CPU;
4343
mutable uint64_t relaxedCnt;
44+
mutable const MCInst *RelaxedMCB = nullptr;
4445
std::unique_ptr <MCInstrInfo> MCII;
4546
std::unique_ptr <MCInst *> RelaxTarget;
4647
MCInst * Extender;
@@ -560,17 +561,17 @@ class HexagonAsmBackend : public MCAsmBackend {
560561
/// \param Inst - The instruction to test.
561562
bool mayNeedRelaxation(MCInst const &Inst,
562563
const MCSubtargetInfo &STI) const override {
564+
RelaxedMCB = &Inst;
563565
return true;
564566
}
565567

566568
/// fixupNeedsRelaxation - Target specific predicate for whether a given
567569
/// fixup requires the associated instruction to be relaxed.
568570
bool fixupNeedsRelaxationAdvanced(const MCAssembler &Asm,
569-
const MCRelaxableFragment &DF,
570571
const MCFixup &Fixup, const MCValue &,
571572
uint64_t Value,
572573
bool Resolved) const override {
573-
MCInst const &MCB = DF.getInst();
574+
MCInst const &MCB = *RelaxedMCB;
574575
assert(HexagonMCInstrInfo::isBundle(MCB));
575576

576577
*RelaxTarget = nullptr;

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -141,9 +141,11 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
141141
return STI->hasFeature(RISCV::FeatureRelax) || ForceRelocs;
142142
}
143143

144-
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(
145-
const MCAssembler &, const MCRelaxableFragment &, const MCFixup &Fixup,
146-
const MCValue &, uint64_t Value, bool Resolved) const {
144+
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCAssembler &,
145+
const MCFixup &Fixup,
146+
const MCValue &,
147+
uint64_t Value,
148+
bool Resolved) const {
147149
if (!RelaxBranches)
148150
return false;
149151

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,6 @@ class RISCVAsmBackend : public MCAsmBackend {
6969
const MCSubtargetInfo *STI) override;
7070

7171
bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
72-
const MCRelaxableFragment &,
7372
const MCFixup &, const MCValue &, uint64_t,
7473
bool) const override;
7574

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