Skip to content

Commit 9192532

Browse files
fhahngithub-actions[bot]
authored andcommitted
Automerge: [VPlan] Slightly extend ExtractLastElement fold to single-scalars.
Update ExtractLastElement fold to support single scalar recipes, if all their users only use scalars.
2 parents a1ffd4f + c4b17bf commit 9192532

File tree

2 files changed

+9
-10
lines changed

2 files changed

+9
-10
lines changed

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1270,11 +1270,12 @@ static void simplifyRecipe(VPRecipeBase &R, VPTypeAnalysis &TypeInfo) {
12701270
return;
12711271
}
12721272

1273-
VPInstruction *OpVPI;
1274-
if (match(Def, m_ExtractLastElement(m_VPInstruction(OpVPI))) &&
1275-
OpVPI->isVectorToScalar()) {
1276-
Def->replaceAllUsesWith(OpVPI);
1277-
return;
1273+
if (match(Def,
1274+
m_VPInstruction<VPInstruction::ExtractLastElement>(m_VPValue(A))) &&
1275+
vputils::isSingleScalar(A) && all_of(A->users(), [Def, A](VPUser *U) {
1276+
return U->usesScalars(A) || Def == U;
1277+
})) {
1278+
return Def->replaceAllUsesWith(A);
12781279
}
12791280
}
12801281

llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -97,14 +97,12 @@ define i8 @pr141968(i1 %cond, i8 %v) {
9797
; CHECK: [[PRED_SDIV_IF29]]:
9898
; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE30]]
9999
; CHECK: [[PRED_SDIV_CONTINUE30]]:
100-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT31:%.*]] = insertelement <16 x i8> poison, i8 [[V]], i64 0
101-
; CHECK-NEXT: [[BROADCAST_SPLAT32:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT31]], <16 x i8> poison, <16 x i32> zeroinitializer
102-
; CHECK-NEXT: [[PREDPHI:%.*]] = select <16 x i1> [[BROADCAST_SPLAT]], <16 x i8> zeroinitializer, <16 x i8> [[BROADCAST_SPLAT32]]
100+
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i1> [[BROADCAST_SPLAT]], i32 0
101+
; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP18]], i8 0, i8 [[V]]
103102
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16
104103
; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[INDEX_NEXT]], 256
105104
; CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
106105
; CHECK: [[MIDDLE_BLOCK]]:
107-
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 15
108106
; CHECK-NEXT: br label %[[EXIT:.*]]
109107
; CHECK: [[SCALAR_PH]]:
110108
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
@@ -121,7 +119,7 @@ define i8 @pr141968(i1 %cond, i8 %v) {
121119
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i8 [[IV_NEXT]], 0
122120
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
123121
; CHECK: [[EXIT]]:
124-
; CHECK-NEXT: [[RET_LCSSA:%.*]] = phi i8 [ [[RET]], %[[LOOP_LATCH]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ]
122+
; CHECK-NEXT: [[RET_LCSSA:%.*]] = phi i8 [ [[RET]], %[[LOOP_LATCH]] ], [ [[PREDPHI]], %[[MIDDLE_BLOCK]] ]
125123
; CHECK-NEXT: ret i8 [[RET_LCSSA]]
126124
;
127125
entry:

0 commit comments

Comments
 (0)