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jurahularsenm
jurahul
and
arsenm
authored
[NFC][TableGen] Adopt CodeGenInstruction::getName() (#156968)
Co-authored-by: Matt Arsenault <[email protected]>
1 parent d3c91d5 commit 927eba2

15 files changed

+85
-97
lines changed

‎llvm/utils/TableGen/AsmMatcherEmitter.cpp‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1545,7 +1545,7 @@ void AsmMatcherInfo::buildInfo() {
15451545

15461546
// If the tblgen -match-prefix option is specified (for tblgen hackers),
15471547
// filter the set of instructions we consider.
1548-
if (!StringRef(CGI->TheDef->getName()).starts_with(MatchPrefix))
1548+
if (!StringRef(CGI->getName()).starts_with(MatchPrefix))
15491549
continue;
15501550

15511551
// Ignore "codegen only" instructions.
@@ -1578,8 +1578,7 @@ void AsmMatcherInfo::buildInfo() {
15781578
// If the tblgen -match-prefix option is specified (for tblgen hackers),
15791579
// filter the set of instruction aliases we consider, based on the target
15801580
// instruction.
1581-
if (!StringRef(Alias->ResultInst->TheDef->getName())
1582-
.starts_with(MatchPrefix))
1581+
if (!StringRef(Alias->ResultInst->getName()).starts_with(MatchPrefix))
15831582
continue;
15841583

15851584
StringRef V = Alias->TheDef->getValueAsString("AsmVariantName");
@@ -3562,7 +3561,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
35623561
char(MI->Mnemonic.size()) + MI->Mnemonic.lower();
35633562
OS << " { " << *StringTable.GetStringOffset(LenMnemonic) << " /* "
35643563
<< MI->Mnemonic << " */, " << Target.getInstNamespace()
3565-
<< "::" << MI->getResultInst()->TheDef->getName() << ", "
3564+
<< "::" << MI->getResultInst()->getName() << ", "
35663565
<< MI->ConversionFnKind << ", ";
35673566

35683567
// Write the required features mask.

‎llvm/utils/TableGen/AsmWriterEmitter.cpp‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -129,11 +129,10 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
129129
}
130130
}
131131

132-
O << " case " << FirstInst.CGI->Namespace
133-
<< "::" << FirstInst.CGI->TheDef->getName() << ":\n";
132+
O << " case " << FirstInst.CGI->Namespace << "::" << FirstInst.CGI->getName()
133+
<< ":\n";
134134
for (const AsmWriterInst &AWI : SimilarInsts)
135-
O << " case " << AWI.CGI->Namespace << "::" << AWI.CGI->TheDef->getName()
136-
<< ":\n";
135+
O << " case " << AWI.CGI->Namespace << "::" << AWI.CGI->getName() << ":\n";
137136
for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
138137
if (i != DifferingOperand) {
139138
// If the operand is the same for all instructions, just print it.
@@ -145,12 +144,12 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
145144
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
146145
std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
147146
OpsToPrint.emplace_back(FirstInst.CGI->Namespace.str() +
148-
"::" + FirstInst.CGI->TheDef->getName().str(),
147+
"::" + FirstInst.CGI->getName().str(),
149148
FirstInst.Operands[i]);
150149

151150
for (const AsmWriterInst &AWI : SimilarInsts) {
152151
OpsToPrint.emplace_back(AWI.CGI->Namespace.str() +
153-
"::" + AWI.CGI->TheDef->getName().str(),
152+
"::" + AWI.CGI->getName().str(),
154153
AWI.Operands[i]);
155154
}
156155
std::reverse(OpsToPrint.begin(), OpsToPrint.end());
@@ -188,11 +187,11 @@ void AsmWriterEmitter::FindUniqueOperandCommands(
188187
if (I != UniqueOperandCommands.end()) {
189188
size_t idx = I - UniqueOperandCommands.begin();
190189
InstrsForCase[idx] += ", ";
191-
InstrsForCase[idx] += Inst.CGI->TheDef->getName();
190+
InstrsForCase[idx] += Inst.CGI->getName();
192191
InstIdxs[idx].push_back(i);
193192
} else {
194193
UniqueOperandCommands.push_back(std::move(Command));
195-
InstrsForCase.push_back(Inst.CGI->TheDef->getName().str());
194+
InstrsForCase.push_back(Inst.CGI->getName().str());
196195
InstIdxs.emplace_back();
197196
InstIdxs.back().push_back(i);
198197

@@ -451,7 +450,7 @@ void AsmWriterEmitter::EmitGetMnemonic(
451450
<< "[] = {\n";
452451
for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
453452
O << " " << ((OpcodeInfo[i] >> Shift) & Mask) << "U,\t// "
454-
<< NumberedInstructions[i]->TheDef->getName() << "\n";
453+
<< NumberedInstructions[i]->getName() << '\n';
455454
}
456455
O << " };\n\n";
457456
// Emit string to combine the individual table lookups.
@@ -1317,7 +1316,7 @@ AsmWriterEmitter::AsmWriterEmitter(const RecordKeeper &R)
13171316
NumberedInstructions = Target.getInstructions();
13181317

13191318
for (const auto &[Idx, I] : enumerate(NumberedInstructions)) {
1320-
if (!I->AsmString.empty() && I->TheDef->getName() != "PHI")
1319+
if (!I->AsmString.empty() && I->getName() != "PHI")
13211320
Instructions.emplace_back(*I, Idx, Variant);
13221321
}
13231322
}

‎llvm/utils/TableGen/Common/AsmWriterInst.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex,
9494
PrintFatalError(
9595
CGI.TheDef->getLoc(),
9696
"Non-supported escaped character found in instruction '" +
97-
CGI.TheDef->getName() + "'!");
97+
CGI.getName() + "'!");
9898
}
9999
LastEmitted = DollarPos + 2;
100100
continue;
@@ -135,7 +135,7 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex,
135135
PrintFatalError(
136136
CGI.TheDef->getLoc(),
137137
"Reached end of string before terminating curly brace in '" +
138-
CGI.TheDef->getName() + "'");
138+
CGI.getName() + "'");
139139

140140
// Look for a modifier string.
141141
if (AsmString[VarEnd] == ':') {
@@ -144,28 +144,28 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned CGIIndex,
144144
PrintFatalError(
145145
CGI.TheDef->getLoc(),
146146
"Reached end of string before terminating curly brace in '" +
147-
CGI.TheDef->getName() + "'");
147+
CGI.getName() + "'");
148148

149149
std::string::size_type ModifierStart = VarEnd;
150150
while (VarEnd < AsmString.size() && isIdentChar(AsmString[VarEnd]))
151151
++VarEnd;
152152
Modifier = AsmString.substr(ModifierStart, VarEnd - ModifierStart);
153153
if (Modifier.empty())
154154
PrintFatalError(CGI.TheDef->getLoc(),
155-
"Bad operand modifier name in '" +
156-
CGI.TheDef->getName() + "'");
155+
"Bad operand modifier name in '" + CGI.getName() +
156+
"'");
157157
}
158158

159159
if (AsmString[VarEnd] != '}')
160160
PrintFatalError(
161161
CGI.TheDef->getLoc(),
162162
"Variable name beginning with '{' did not end with '}' in '" +
163-
CGI.TheDef->getName() + "'");
163+
CGI.getName() + "'");
164164
++VarEnd;
165165
}
166166
if (VarName.empty() && Modifier.empty())
167167
PrintFatalError(CGI.TheDef->getLoc(),
168-
"Stray '$' in '" + CGI.TheDef->getName() +
168+
"Stray '$' in '" + CGI.getName() +
169169
"' asm string, maybe you want $$?");
170170

171171
if (VarName.empty()) {

‎llvm/utils/TableGen/Common/CodeGenSchedule.cpp‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ struct InstRegexOp : public SetTheory::Operator {
134134

135135
// The generic opcodes are unsorted, handle them manually.
136136
for (auto *Inst : Generics) {
137-
StringRef InstName = Inst->TheDef->getName();
137+
StringRef InstName = Inst->getName();
138138
if (InstName.starts_with(Prefix) &&
139139
(!Regexpr || Regexpr->match(InstName.substr(Prefix.size())))) {
140140
Elts.insert(Inst->TheDef);
@@ -147,11 +147,10 @@ struct InstRegexOp : public SetTheory::Operator {
147147
// sorted by name. Find the sub-ranges that start with our prefix.
148148
struct Comp {
149149
bool operator()(const CodeGenInstruction *LHS, StringRef RHS) {
150-
return LHS->TheDef->getName() < RHS;
150+
return LHS->getName() < RHS;
151151
}
152152
bool operator()(StringRef LHS, const CodeGenInstruction *RHS) {
153-
return LHS < RHS->TheDef->getName() &&
154-
!RHS->TheDef->getName().starts_with(LHS);
153+
return LHS < RHS->getName() && !RHS->getName().starts_with(LHS);
155154
}
156155
};
157156
auto Range1 =
@@ -162,7 +161,7 @@ struct InstRegexOp : public SetTheory::Operator {
162161
// For these ranges we know that instruction names start with the prefix.
163162
// Check if there's a regex that needs to be checked.
164163
const auto HandleNonGeneric = [&](const CodeGenInstruction *Inst) {
165-
StringRef InstName = Inst->TheDef->getName();
164+
StringRef InstName = Inst->getName();
166165
if (!Regexpr || Regexpr->match(InstName.substr(Prefix.size()))) {
167166
Elts.insert(Inst->TheDef);
168167
NumMatches++;
@@ -862,12 +861,12 @@ void CodeGenSchedModels::collectSchedClasses() {
862861
dbgs()
863862
<< "\n+++ ITINERARIES and/or MACHINE MODELS (collectSchedClasses) +++\n");
864863
for (const CodeGenInstruction *Inst : Target.getInstructions()) {
865-
StringRef InstName = Inst->TheDef->getName();
864+
StringRef InstName = Inst->getName();
866865
unsigned SCIdx = getSchedClassIdx(*Inst);
867866
if (!SCIdx) {
868867
LLVM_DEBUG({
869868
if (!Inst->hasNoSchedulingInfo)
870-
dbgs() << "No machine model for " << Inst->TheDef->getName() << '\n';
869+
dbgs() << "No machine model for " << Inst->getName() << '\n';
871870
});
872871
continue;
873872
}
@@ -916,7 +915,7 @@ void CodeGenSchedModels::collectSchedClasses() {
916915
if (!llvm::is_contained(ProcIndices, 0)) {
917916
for (const CodeGenProcModel &PM : ProcModels) {
918917
if (!llvm::is_contained(ProcIndices, PM.Index))
919-
dbgs() << "No machine model for " << Inst->TheDef->getName()
918+
dbgs() << "No machine model for " << Inst->getName()
920919
<< " on processor " << PM.ModelName << '\n';
921920
}
922921
}
@@ -1932,7 +1931,7 @@ void CodeGenSchedModels::checkCompleteness() {
19321931
if (Inst->TheDef->isValueUnset("SchedRW")) {
19331932
PrintError(Inst->TheDef->getLoc(),
19341933
"No schedule information for instruction '" +
1935-
Inst->TheDef->getName() + "' in SchedMachineModel '" +
1934+
Inst->getName() + "' in SchedMachineModel '" +
19361935
ProcModel.ModelDef->getName() + "'");
19371936
Complete = false;
19381937
}
@@ -1953,7 +1952,7 @@ void CodeGenSchedModels::checkCompleteness() {
19531952
if (I == InstRWs.end()) {
19541953
PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName +
19551954
"' lacks information for '" +
1956-
Inst->TheDef->getName() + "'");
1955+
Inst->getName() + "'");
19571956
Complete = false;
19581957
}
19591958
}

‎llvm/utils/TableGen/Common/DAGISelMatcher.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -284,7 +284,7 @@ void EmitNodeXFormMatcher::printImpl(raw_ostream &OS, indent Indent) const {
284284
void EmitNodeMatcherCommon::printImpl(raw_ostream &OS, indent Indent) const {
285285
OS << Indent;
286286
OS << (isa<MorphNodeToMatcher>(this) ? "MorphNodeTo: " : "EmitNode: ")
287-
<< CGI.Namespace << "::" << CGI.TheDef->getName() << ": <todo flags> ";
287+
<< CGI.Namespace << "::" << CGI.getName() << ": <todo flags> ";
288288

289289
for (MVT::SimpleValueType VT : VTs)
290290
OS << ' ' << getEnumName(VT);

‎llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp‎

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1455,9 +1455,8 @@ RecordAndValue
14551455
InstructionOpcodeMatcher::getInstValue(const CodeGenInstruction *I) const {
14561456
const auto VI = OpcodeValues.find(I);
14571457
if (VI != OpcodeValues.end())
1458-
return {MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName()),
1459-
VI->second};
1460-
return MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName());
1458+
return {MatchTable::NamedValue(2, I->Namespace, I->getName()), VI->second};
1459+
return MatchTable::NamedValue(2, I->Namespace, I->getName());
14611460
}
14621461

14631462
void InstructionOpcodeMatcher::initOpcodeValuesMap(
@@ -1474,9 +1473,8 @@ RecordAndValue InstructionOpcodeMatcher::getValue() const {
14741473
const CodeGenInstruction *I = Insts[0];
14751474
const auto VI = OpcodeValues.find(I);
14761475
if (VI != OpcodeValues.end())
1477-
return {MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName()),
1478-
VI->second};
1479-
return MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName());
1476+
return {MatchTable::NamedValue(2, I->Namespace, I->getName()), VI->second};
1477+
return MatchTable::NamedValue(2, I->Namespace, I->getName());
14801478
}
14811479

14821480
void InstructionOpcodeMatcher::emitPredicateOpcodes(MatchTable &Table,
@@ -1503,17 +1501,17 @@ bool InstructionOpcodeMatcher::isHigherPriorityThan(
15031501
// using instruction frequency information to improve compile time.
15041502
if (const InstructionOpcodeMatcher *BO =
15051503
dyn_cast<InstructionOpcodeMatcher>(&B))
1506-
return Insts[0]->TheDef->getName() < BO->Insts[0]->TheDef->getName();
1504+
return Insts[0]->getName() < BO->Insts[0]->getName();
15071505

15081506
return false;
15091507
}
15101508

15111509
bool InstructionOpcodeMatcher::isConstantInstruction() const {
1512-
return Insts.size() == 1 && Insts[0]->TheDef->getName() == "G_CONSTANT";
1510+
return Insts.size() == 1 && Insts[0]->getName() == "G_CONSTANT";
15131511
}
15141512

15151513
StringRef InstructionOpcodeMatcher::getOpcode() const {
1516-
return Insts[0]->TheDef->getName();
1514+
return Insts[0]->getName();
15171515
}
15181516

15191517
bool InstructionOpcodeMatcher::isVariadicNumOperands() const {
@@ -2245,7 +2243,7 @@ void BuildMIAction::emitActionOpcodes(MatchTable &Table,
22452243
<< MatchTable::Comment("RecycleInsnID")
22462244
<< MatchTable::ULEB128Value(RecycleInsnID)
22472245
<< MatchTable::Comment("Opcode")
2248-
<< MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName())
2246+
<< MatchTable::NamedValue(2, I->Namespace, I->getName())
22492247
<< MatchTable::LineBreak;
22502248

22512249
if (!I->ImplicitDefs.empty() || !I->ImplicitUses.empty()) {
@@ -2292,7 +2290,7 @@ void BuildMIAction::emitActionOpcodes(MatchTable &Table,
22922290
}
22932291

22942292
Table << MatchTable::Comment("Opcode")
2295-
<< MatchTable::NamedValue(2, I->Namespace, I->TheDef->getName())
2293+
<< MatchTable::NamedValue(2, I->Namespace, I->getName())
22962294
<< MatchTable::LineBreak;
22972295

22982296
for (const auto &Renderer : OperandRenderers)

‎llvm/utils/TableGen/Common/GlobalISel/Patterns.cpp‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -168,8 +168,7 @@ void Pattern::printImpl(raw_ostream &OS, bool PrintName,
168168
void AnyOpcodePattern::print(raw_ostream &OS, bool PrintName) const {
169169
printImpl(OS, PrintName, [&OS, this]() {
170170
OS << "["
171-
<< join(map_range(Insts,
172-
[](const auto *I) { return I->TheDef->getName(); }),
171+
<< join(map_range(Insts, [](const auto *I) { return I->getName(); }),
173172
", ")
174173
<< "]";
175174
});
@@ -366,7 +365,7 @@ void MIFlagsInfo::addCopyFlag(StringRef InstName) { CopyF.insert(InstName); }
366365
//===- CodeGenInstructionPattern ------------------------------------------===//
367366

368367
bool CodeGenInstructionPattern::is(StringRef OpcodeName) const {
369-
return I.TheDef->getName() == OpcodeName;
368+
return I.getName() == OpcodeName;
370369
}
371370

372371
bool CodeGenInstructionPattern::isVariadic() const {
@@ -416,9 +415,7 @@ MIFlagsInfo &CodeGenInstructionPattern::getOrCreateMIFlagsInfo() {
416415
return *FI;
417416
}
418417

419-
StringRef CodeGenInstructionPattern::getInstName() const {
420-
return I.TheDef->getName();
421-
}
418+
StringRef CodeGenInstructionPattern::getInstName() const { return I.getName(); }
422419

423420
void CodeGenInstructionPattern::printExtras(raw_ostream &OS) const {
424421
if (isIntrinsic())

‎llvm/utils/TableGen/CompressInstEmitter.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -237,7 +237,7 @@ void CompressInstEmitter::addDagOperandMapping(const Record *Rec,
237237
// Source instructions can have at most 1 tied operand.
238238
if (IsSourceInst && (OpNo - DAGOpNo > 1))
239239
PrintFatalError(Rec->getLoc(),
240-
"Input operands for Inst '" + Inst.TheDef->getName() +
240+
"Input operands for Inst '" + Inst.getName() +
241241
"' and input Dag operand count mismatch");
242242

243243
continue;
@@ -249,7 +249,7 @@ void CompressInstEmitter::addDagOperandMapping(const Record *Rec,
249249
OpndRec = cast<DefInit>(Opnd.MIOperandInfo->getArg(SubOp))->getDef();
250250

251251
if (DAGOpNo >= Dag->getNumArgs())
252-
PrintFatalError(Rec->getLoc(), "Inst '" + Inst.TheDef->getName() +
252+
PrintFatalError(Rec->getLoc(), "Inst '" + Inst.getName() +
253253
"' and Dag operand count mismatch");
254254

255255
if (const auto *DI = dyn_cast<DefInit>(Dag->getArg(DAGOpNo))) {
@@ -328,7 +328,7 @@ void CompressInstEmitter::addDagOperandMapping(const Record *Rec,
328328

329329
// We shouldn't have extra Dag operands.
330330
if (DAGOpNo != Dag->getNumArgs())
331-
PrintFatalError(Rec->getLoc(), "Inst '" + Inst.TheDef->getName() +
331+
PrintFatalError(Rec->getLoc(), "Inst '" + Inst.getName() +
332332
"' and Dag operand count mismatch");
333333
}
334334

@@ -590,8 +590,8 @@ void CompressInstEmitter::emitCompressInstEmitter(raw_ostream &OS,
590590
llvm::stable_sort(CompressPatterns, [EType](const CompressPat &LHS,
591591
const CompressPat &RHS) {
592592
if (EType == EmitterType::Compress || EType == EmitterType::CheckCompress)
593-
return (LHS.Source.TheDef->getName() < RHS.Source.TheDef->getName());
594-
return (LHS.Dest.TheDef->getName() < RHS.Dest.TheDef->getName());
593+
return LHS.Source.getName() < RHS.Source.getName();
594+
return LHS.Dest.getName() < RHS.Dest.getName();
595595
});
596596

597597
// A list of MCOperandPredicates for all operands in use, and the reverse map.
@@ -678,7 +678,7 @@ void CompressInstEmitter::emitCompressInstEmitter(raw_ostream &OS,
678678
CompressOrCheck ? CompressPat.DestOperandMap
679679
: CompressPat.SourceOperandMap;
680680

681-
CurOp = Source.TheDef->getName();
681+
CurOp = Source.getName();
682682
// Check current and previous opcode to decide to continue or end a case.
683683
if (CurOp != PrevOp) {
684684
if (!PrevOp.empty()) {
@@ -768,7 +768,7 @@ void CompressInstEmitter::emitCompressInstEmitter(raw_ostream &OS,
768768
CodeStream.indent(6) << "// " << Dest.AsmString << "\n";
769769
if (CompressOrUncompress)
770770
CodeStream.indent(6) << "OutInst.setOpcode(" << TargetName
771-
<< "::" << Dest.TheDef->getName() << ");\n";
771+
<< "::" << Dest.getName() << ");\n";
772772
OpNo = 0;
773773
for (const auto &DestOperand : Dest.Operands) {
774774
CodeStream.indent(6) << "// Operand: " << DestOperand.Name << "\n";

‎llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1662,8 +1662,7 @@ bool CombineRuleBuilder::emitMatchPattern(CodeExpansions &CE,
16621662

16631663
const bool IsUsingCustomCXXAction = hasOnlyCXXApplyPatterns();
16641664
for (const CodeGenInstruction *CGI : AOP.insts()) {
1665-
auto &M = addRuleMatcher(Alts, "wip_match_opcode '" +
1666-
CGI->TheDef->getName() + "'");
1665+
auto &M = addRuleMatcher(Alts, "wip_match_opcode '" + CGI->getName() + "'");
16671666

16681667
InstructionMatcher &IM = M.addInstructionMatcher(AOP.getName());
16691668
declareInstExpansion(CE, IM, AOP.getName());
@@ -2201,7 +2200,7 @@ bool CombineRuleBuilder::emitBuiltinApplyPattern(
22012200

22022201
bool isLiteralImm(const InstructionPattern &P, unsigned OpIdx) {
22032202
if (const auto *CGP = dyn_cast<CodeGenInstructionPattern>(&P)) {
2204-
StringRef InstName = CGP->getInst().TheDef->getName();
2203+
StringRef InstName = CGP->getInst().getName();
22052204
return (InstName == "G_CONSTANT" || InstName == "G_FCONSTANT") &&
22062205
OpIdx == 1;
22072206
}

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