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Automerge: [RISCV] Handle implicit defs when ensuring pseudo dominates in peephole (#148181)
Previously we just assumed that no instruction that needed to be moved would have an implicit def, but vnclip pseudos will. We can still try to move them but we just need to check that no instructions between have any reads or writes to the physical register. Fixes #147986
2 parents 29bfe4b + 6563c79 commit 94ff0cc

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+49
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llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -521,16 +521,23 @@ bool RISCVVectorPeephole::convertToUnmasked(MachineInstr &MI) const {
521521
/// Check if it's safe to move From down to To, checking that no physical
522522
/// registers are clobbered.
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static bool isSafeToMove(const MachineInstr &From, const MachineInstr &To) {
524-
assert(From.getParent() == To.getParent() && !From.hasImplicitDef());
525-
SmallVector<Register> PhysUses;
524+
assert(From.getParent() == To.getParent());
525+
SmallVector<Register> PhysUses, PhysDefs;
526526
for (const MachineOperand &MO : From.all_uses())
527527
if (MO.getReg().isPhysical())
528528
PhysUses.push_back(MO.getReg());
529+
for (const MachineOperand &MO : From.all_defs())
530+
if (MO.getReg().isPhysical())
531+
PhysDefs.push_back(MO.getReg());
529532
bool SawStore = false;
530-
for (auto II = From.getIterator(); II != To.getIterator(); II++) {
533+
for (auto II = std::next(From.getIterator()); II != To.getIterator(); II++) {
531534
for (Register PhysReg : PhysUses)
532535
if (II->definesRegister(PhysReg, nullptr))
533536
return false;
537+
for (Register PhysReg : PhysDefs)
538+
if (II->definesRegister(PhysReg, nullptr) ||
539+
II->readsRegister(PhysReg, nullptr))
540+
return false;
534541
if (II->mayStore()) {
535542
SawStore = true;
536543
break;

llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,3 +55,42 @@ body: |
5555
%mask:vmv0 = COPY $v0
5656
%y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %x, %mask, %avl, 5 /* e32 */
5757
...
58+
---
59+
name: vnclip_move_past_passthru
60+
body: |
61+
bb.0:
62+
liveins: $x8, $v0, $v8
63+
; CHECK-LABEL: name: vnclip_move_past_passthru
64+
; CHECK: liveins: $x8, $v0, $v8
65+
; CHECK-NEXT: {{ $}}
66+
; CHECK-NEXT: %avl:gprnox0 = COPY $x8
67+
; CHECK-NEXT: %passthru:vrnov0 = COPY $v8
68+
; CHECK-NEXT: %mask:vmv0 = COPY $v0
69+
; CHECK-NEXT: %y:vrnov0 = PseudoVNCLIPU_WV_MF2_MASK %passthru, $noreg, $noreg, %mask, 0, %avl, 5 /* e32 */, 0 /* tu, mu */, implicit-def $vxsat
70+
%avl:gprnox0 = COPY $x8
71+
%x:vr = PseudoVNCLIPU_WV_MF2 $noreg, $noreg, $noreg, 0, -1, 5, 3, implicit-def $vxsat
72+
%passthru:vrnov0 = COPY $v8
73+
%mask:vmv0 = COPY $v0
74+
%y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %x, %mask, %avl, 5 /* e32 */
75+
...
76+
---
77+
name: vnclip_cant_move_past_passthru
78+
body: |
79+
bb.0:
80+
liveins: $x8, $v0, $v8
81+
; CHECK-LABEL: name: vnclip_cant_move_past_passthru
82+
; CHECK: liveins: $x8, $v0, $v8
83+
; CHECK-NEXT: {{ $}}
84+
; CHECK-NEXT: %avl:gprnox0 = COPY $x8
85+
; CHECK-NEXT: %x:vr = PseudoVNCLIPU_WV_MF2 $noreg, $noreg, $noreg, 0, -1, 5 /* e32 */, 3 /* ta, ma */, implicit-def $vxsat
86+
; CHECK-NEXT: %vxsat:gpr = COPY $vxsat
87+
; CHECK-NEXT: %passthru:vrnov0 = COPY $v8
88+
; CHECK-NEXT: %mask:vmv0 = COPY $v0
89+
; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %x, %mask, %avl, 5 /* e32 */
90+
%avl:gprnox0 = COPY $x8
91+
%x:vr = PseudoVNCLIPU_WV_MF2 $noreg, $noreg, $noreg, 0, -1, 5, 3, implicit-def $vxsat
92+
%vxsat:gpr = COPY $vxsat
93+
%passthru:vrnov0 = COPY $v8
94+
%mask:vmv0 = COPY $v0
95+
%y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %x, %mask, %avl, 5 /* e32 */
96+
...

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