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[X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (#122530)
This matches binutils.
1 parent ae54617 commit 9844bad

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11 files changed

+808
-827
lines changed

11 files changed

+808
-827
lines changed

‎llvm/lib/Target/X86/AsmParser/X86Operand.h‎

Lines changed: 19 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -340,46 +340,38 @@ struct X86Operand final : public MCParsedAsmOperand {
340340
return Mem.IndexReg >= LowR && Mem.IndexReg <= HighR;
341341
}
342342

343+
bool isMem32_RC128() const {
344+
return isMem32() && isMemIndexReg(X86::XMM0, X86::XMM15);
345+
}
343346
bool isMem64_RC128() const {
344347
return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM15);
345348
}
346-
bool isMem128_RC128() const {
347-
return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM15);
348-
}
349-
bool isMem128_RC256() const {
350-
return isMem128() && isMemIndexReg(X86::YMM0, X86::YMM15);
349+
bool isMem32_RC256() const {
350+
return isMem32() && isMemIndexReg(X86::YMM0, X86::YMM15);
351351
}
352-
bool isMem256_RC128() const {
353-
return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM15);
354-
}
355-
bool isMem256_RC256() const {
356-
return isMem256() && isMemIndexReg(X86::YMM0, X86::YMM15);
352+
bool isMem64_RC256() const {
353+
return isMem64() && isMemIndexReg(X86::YMM0, X86::YMM15);
357354
}
358355

356+
bool isMem32_RC128X() const {
357+
return isMem32() && X86II::isXMMReg(Mem.IndexReg);
358+
}
359359
bool isMem64_RC128X() const {
360360
return isMem64() && X86II::isXMMReg(Mem.IndexReg);
361361
}
362-
bool isMem128_RC128X() const {
363-
return isMem128() && X86II::isXMMReg(Mem.IndexReg);
362+
bool isMem32_RC256X() const {
363+
return isMem32() && X86II::isYMMReg(Mem.IndexReg);
364364
}
365-
bool isMem128_RC256X() const {
366-
return isMem128() && X86II::isYMMReg(Mem.IndexReg);
365+
bool isMem64_RC256X() const {
366+
return isMem64() && X86II::isYMMReg(Mem.IndexReg);
367367
}
368-
bool isMem256_RC128X() const {
369-
return isMem256() && X86II::isXMMReg(Mem.IndexReg);
368+
bool isMem32_RC512() const {
369+
return isMem32() && X86II::isZMMReg(Mem.IndexReg);
370370
}
371-
bool isMem256_RC256X() const {
372-
return isMem256() && X86II::isYMMReg(Mem.IndexReg);
373-
}
374-
bool isMem256_RC512() const {
375-
return isMem256() && X86II::isZMMReg(Mem.IndexReg);
376-
}
377-
bool isMem512_RC256X() const {
378-
return isMem512() && X86II::isYMMReg(Mem.IndexReg);
379-
}
380-
bool isMem512_RC512() const {
381-
return isMem512() && X86II::isZMMReg(Mem.IndexReg);
371+
bool isMem64_RC512() const {
372+
return isMem64() && X86II::isZMMReg(Mem.IndexReg);
382373
}
374+
383375
bool isMem512_GR16() const {
384376
if (!isMem512())
385377
return false;

‎llvm/lib/Target/X86/X86InstrAVX512.td‎

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -10279,36 +10279,36 @@ multiclass avx512_gather<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
1027910279
multiclass avx512_gather_q_pd<bits<8> dopc, bits<8> qopc,
1028010280
AVX512VLVectorVTInfo _, string OpcodeStr, string SUFF> {
1028110281
defm NAME#D#SUFF#Z: avx512_gather<dopc, OpcodeStr#"d", _.info512,
10282-
vy512xmem>, EVEX_V512, REX_W;
10282+
vy64xmem>, EVEX_V512, REX_W;
1028310283
defm NAME#Q#SUFF#Z: avx512_gather<qopc, OpcodeStr#"q", _.info512,
10284-
vz512mem>, EVEX_V512, REX_W;
10284+
vz64mem>, EVEX_V512, REX_W;
1028510285
let Predicates = [HasVLX] in {
1028610286
defm NAME#D#SUFF#Z256: avx512_gather<dopc, OpcodeStr#"d", _.info256,
10287-
vx256xmem>, EVEX_V256, REX_W;
10287+
vx64xmem>, EVEX_V256, REX_W;
1028810288
defm NAME#Q#SUFF#Z256: avx512_gather<qopc, OpcodeStr#"q", _.info256,
10289-
vy256xmem>, EVEX_V256, REX_W;
10289+
vy64xmem>, EVEX_V256, REX_W;
1029010290
defm NAME#D#SUFF#Z128: avx512_gather<dopc, OpcodeStr#"d", _.info128,
10291-
vx128xmem>, EVEX_V128, REX_W;
10291+
vx64xmem>, EVEX_V128, REX_W;
1029210292
defm NAME#Q#SUFF#Z128: avx512_gather<qopc, OpcodeStr#"q", _.info128,
10293-
vx128xmem>, EVEX_V128, REX_W;
10293+
vx64xmem>, EVEX_V128, REX_W;
1029410294
}
1029510295
}
1029610296

1029710297
multiclass avx512_gather_d_ps<bits<8> dopc, bits<8> qopc,
1029810298
AVX512VLVectorVTInfo _, string OpcodeStr, string SUFF> {
10299-
defm NAME#D#SUFF#Z: avx512_gather<dopc, OpcodeStr#"d", _.info512, vz512mem>,
10299+
defm NAME#D#SUFF#Z: avx512_gather<dopc, OpcodeStr#"d", _.info512, vz32mem>,
1030010300
EVEX_V512;
10301-
defm NAME#Q#SUFF#Z: avx512_gather<qopc, OpcodeStr#"q", _.info256, vz256mem>,
10301+
defm NAME#Q#SUFF#Z: avx512_gather<qopc, OpcodeStr#"q", _.info256, vz32mem>,
1030210302
EVEX_V512;
1030310303
let Predicates = [HasVLX] in {
1030410304
defm NAME#D#SUFF#Z256: avx512_gather<dopc, OpcodeStr#"d", _.info256,
10305-
vy256xmem>, EVEX_V256;
10305+
vy32xmem>, EVEX_V256;
1030610306
defm NAME#Q#SUFF#Z256: avx512_gather<qopc, OpcodeStr#"q", _.info128,
10307-
vy128xmem>, EVEX_V256;
10307+
vy32xmem>, EVEX_V256;
1030810308
defm NAME#D#SUFF#Z128: avx512_gather<dopc, OpcodeStr#"d", _.info128,
10309-
vx128xmem>, EVEX_V128;
10309+
vx32xmem>, EVEX_V128;
1031010310
defm NAME#Q#SUFF#Z128: avx512_gather<qopc, OpcodeStr#"q", _.info128,
10311-
vx64xmem, VK2WM>, EVEX_V128;
10311+
vx32xmem, VK2WM>, EVEX_V128;
1031210312
}
1031310313
}
1031410314

@@ -10336,36 +10336,36 @@ let mayStore = 1, Constraints = "$mask = $mask_wb", ExeDomain = _.ExeDomain,
1033610336
multiclass avx512_scatter_q_pd<bits<8> dopc, bits<8> qopc,
1033710337
AVX512VLVectorVTInfo _, string OpcodeStr, string SUFF> {
1033810338
defm NAME#D#SUFF#Z: avx512_scatter<dopc, OpcodeStr#"d", _.info512,
10339-
vy512xmem>, EVEX_V512, REX_W;
10339+
vy64xmem>, EVEX_V512, REX_W;
1034010340
defm NAME#Q#SUFF#Z: avx512_scatter<qopc, OpcodeStr#"q", _.info512,
10341-
vz512mem>, EVEX_V512, REX_W;
10341+
vz64mem>, EVEX_V512, REX_W;
1034210342
let Predicates = [HasVLX] in {
1034310343
defm NAME#D#SUFF#Z256: avx512_scatter<dopc, OpcodeStr#"d", _.info256,
10344-
vx256xmem>, EVEX_V256, REX_W;
10344+
vx64xmem>, EVEX_V256, REX_W;
1034510345
defm NAME#Q#SUFF#Z256: avx512_scatter<qopc, OpcodeStr#"q", _.info256,
10346-
vy256xmem>, EVEX_V256, REX_W;
10346+
vy64xmem>, EVEX_V256, REX_W;
1034710347
defm NAME#D#SUFF#Z128: avx512_scatter<dopc, OpcodeStr#"d", _.info128,
10348-
vx128xmem>, EVEX_V128, REX_W;
10348+
vx64xmem>, EVEX_V128, REX_W;
1034910349
defm NAME#Q#SUFF#Z128: avx512_scatter<qopc, OpcodeStr#"q", _.info128,
10350-
vx128xmem>, EVEX_V128, REX_W;
10350+
vx64xmem>, EVEX_V128, REX_W;
1035110351
}
1035210352
}
1035310353

1035410354
multiclass avx512_scatter_d_ps<bits<8> dopc, bits<8> qopc,
1035510355
AVX512VLVectorVTInfo _, string OpcodeStr, string SUFF> {
10356-
defm NAME#D#SUFF#Z: avx512_scatter<dopc, OpcodeStr#"d", _.info512, vz512mem>,
10356+
defm NAME#D#SUFF#Z: avx512_scatter<dopc, OpcodeStr#"d", _.info512, vz32mem>,
1035710357
EVEX_V512;
10358-
defm NAME#Q#SUFF#Z: avx512_scatter<qopc, OpcodeStr#"q", _.info256, vz256mem>,
10358+
defm NAME#Q#SUFF#Z: avx512_scatter<qopc, OpcodeStr#"q", _.info256, vz32mem>,
1035910359
EVEX_V512;
1036010360
let Predicates = [HasVLX] in {
1036110361
defm NAME#D#SUFF#Z256: avx512_scatter<dopc, OpcodeStr#"d", _.info256,
10362-
vy256xmem>, EVEX_V256;
10362+
vy32xmem>, EVEX_V256;
1036310363
defm NAME#Q#SUFF#Z256: avx512_scatter<qopc, OpcodeStr#"q", _.info128,
10364-
vy128xmem>, EVEX_V256;
10364+
vy32xmem>, EVEX_V256;
1036510365
defm NAME#D#SUFF#Z128: avx512_scatter<dopc, OpcodeStr#"d", _.info128,
10366-
vx128xmem>, EVEX_V128;
10366+
vx32xmem>, EVEX_V128;
1036710367
defm NAME#Q#SUFF#Z128: avx512_scatter<qopc, OpcodeStr#"q", _.info128,
10368-
vx64xmem, VK2WM>, EVEX_V128;
10368+
vx32xmem, VK2WM>, EVEX_V128;
1036910369
}
1037010370
}
1037110371

@@ -10385,52 +10385,52 @@ multiclass avx512_gather_scatter_prefetch<bits<8> opc, Format F, string OpcodeSt
1038510385
}
1038610386

1038710387
defm VGATHERPF0DPS: avx512_gather_scatter_prefetch<0xC6, MRM1m, "vgatherpf0dps",
10388-
VK16WM, vz512mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10388+
VK16WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1038910389

1039010390
defm VGATHERPF0QPS: avx512_gather_scatter_prefetch<0xC7, MRM1m, "vgatherpf0qps",
10391-
VK8WM, vz256mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10391+
VK8WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1039210392

1039310393
defm VGATHERPF0DPD: avx512_gather_scatter_prefetch<0xC6, MRM1m, "vgatherpf0dpd",
10394-
VK8WM, vy512xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10394+
VK8WM, vy64xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1039510395

1039610396
defm VGATHERPF0QPD: avx512_gather_scatter_prefetch<0xC7, MRM1m, "vgatherpf0qpd",
10397-
VK8WM, vz512mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10397+
VK8WM, vz64mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1039810398

1039910399
defm VGATHERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dps",
10400-
VK16WM, vz512mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10400+
VK16WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1040110401

1040210402
defm VGATHERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qps",
10403-
VK8WM, vz256mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10403+
VK8WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1040410404

1040510405
defm VGATHERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dpd",
10406-
VK8WM, vy512xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10406+
VK8WM, vy64xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1040710407

1040810408
defm VGATHERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qpd",
10409-
VK8WM, vz512mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10409+
VK8WM, vz64mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1041010410

1041110411
defm VSCATTERPF0DPS: avx512_gather_scatter_prefetch<0xC6, MRM5m, "vscatterpf0dps",
10412-
VK16WM, vz512mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10412+
VK16WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1041310413

1041410414
defm VSCATTERPF0QPS: avx512_gather_scatter_prefetch<0xC7, MRM5m, "vscatterpf0qps",
10415-
VK8WM, vz256mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10415+
VK8WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1041610416

1041710417
defm VSCATTERPF0DPD: avx512_gather_scatter_prefetch<0xC6, MRM5m, "vscatterpf0dpd",
10418-
VK8WM, vy512xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10418+
VK8WM, vy64xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1041910419

1042010420
defm VSCATTERPF0QPD: avx512_gather_scatter_prefetch<0xC7, MRM5m, "vscatterpf0qpd",
10421-
VK8WM, vz512mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10421+
VK8WM, vz64mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1042210422

1042310423
defm VSCATTERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM6m, "vscatterpf1dps",
10424-
VK16WM, vz512mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10424+
VK16WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1042510425

1042610426
defm VSCATTERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM6m, "vscatterpf1qps",
10427-
VK8WM, vz256mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
10427+
VK8WM, vz32mem>, EVEX_V512, EVEX_CD8<32, CD8VT1>;
1042810428

1042910429
defm VSCATTERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM6m, "vscatterpf1dpd",
10430-
VK8WM, vy512xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10430+
VK8WM, vy64xmem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1043110431

1043210432
defm VSCATTERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM6m, "vscatterpf1qpd",
10433-
VK8WM, vz512mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
10433+
VK8WM, vz64mem>, EVEX_V512, REX_W, EVEX_CD8<64, CD8VT1>;
1043410434

1043510435
multiclass cvt_by_vec_width<bits<8> opc, X86VectorVTInfo Vec, string OpcodeStr, SchedWrite Sched> {
1043610436
def rk : AVX512XS8I<opc, MRMSrcReg, (outs Vec.RC:$dst), (ins Vec.KRC:$src),

‎llvm/lib/Target/X86/X86InstrOperands.td‎

Lines changed: 17 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -25,20 +25,18 @@ let RenderMethod = "addMemOperands", SuperClasses = [X86MemAsmOperand] in {
2525
def X86Mem256AsmOperand : AsmOperandClass { let Name = "Mem256"; }
2626
def X86Mem512AsmOperand : AsmOperandClass { let Name = "Mem512"; }
2727
// Gather mem operands
28+
def X86Mem32_RC128Operand : AsmOperandClass { let Name = "Mem32_RC128"; }
2829
def X86Mem64_RC128Operand : AsmOperandClass { let Name = "Mem64_RC128"; }
29-
def X86Mem128_RC128Operand : AsmOperandClass { let Name = "Mem128_RC128"; }
30-
def X86Mem256_RC128Operand : AsmOperandClass { let Name = "Mem256_RC128"; }
31-
def X86Mem128_RC256Operand : AsmOperandClass { let Name = "Mem128_RC256"; }
32-
def X86Mem256_RC256Operand : AsmOperandClass { let Name = "Mem256_RC256"; }
30+
def X86Mem32_RC256Operand : AsmOperandClass { let Name = "Mem32_RC256"; }
31+
def X86Mem64_RC256Operand : AsmOperandClass { let Name = "Mem64_RC256"; }
3332

33+
def X86Mem32_RC128XOperand : AsmOperandClass { let Name = "Mem32_RC128X"; }
3434
def X86Mem64_RC128XOperand : AsmOperandClass { let Name = "Mem64_RC128X"; }
35-
def X86Mem128_RC128XOperand : AsmOperandClass { let Name = "Mem128_RC128X"; }
36-
def X86Mem256_RC128XOperand : AsmOperandClass { let Name = "Mem256_RC128X"; }
37-
def X86Mem128_RC256XOperand : AsmOperandClass { let Name = "Mem128_RC256X"; }
38-
def X86Mem256_RC256XOperand : AsmOperandClass { let Name = "Mem256_RC256X"; }
39-
def X86Mem512_RC256XOperand : AsmOperandClass { let Name = "Mem512_RC256X"; }
40-
def X86Mem256_RC512Operand : AsmOperandClass { let Name = "Mem256_RC512"; }
41-
def X86Mem512_RC512Operand : AsmOperandClass { let Name = "Mem512_RC512"; }
35+
def X86Mem32_RC256XOperand : AsmOperandClass { let Name = "Mem32_RC256X"; }
36+
def X86Mem64_RC256XOperand : AsmOperandClass { let Name = "Mem64_RC256X"; }
37+
def X86Mem32_RC512Operand : AsmOperandClass { let Name = "Mem32_RC512"; }
38+
def X86Mem64_RC512Operand : AsmOperandClass { let Name = "Mem64_RC512"; }
39+
4240
def X86Mem512_GR16Operand : AsmOperandClass { let Name = "Mem512_GR16"; }
4341
def X86Mem512_GR32Operand : AsmOperandClass { let Name = "Mem512_GR32"; }
4442
def X86Mem512_GR64Operand : AsmOperandClass { let Name = "Mem512_GR64"; }
@@ -97,20 +95,17 @@ def i512mem_GR32 : X86MemOperand<"printzmmwordmem", X86Mem512_GR32Operand, 512>;
9795
def i512mem_GR64 : X86MemOperand<"printzmmwordmem", X86Mem512_GR64Operand, 512>;
9896

9997
// Gather mem operands
98+
def vx32mem : X86VMemOperand<VR128, "printdwordmem", X86Mem32_RC128Operand, 32>;
10099
def vx64mem : X86VMemOperand<VR128, "printqwordmem", X86Mem64_RC128Operand, 64>;
101-
def vx128mem : X86VMemOperand<VR128, "printxmmwordmem", X86Mem128_RC128Operand, 128>;
102-
def vx256mem : X86VMemOperand<VR128, "printymmwordmem", X86Mem256_RC128Operand, 256>;
103-
def vy128mem : X86VMemOperand<VR256, "printxmmwordmem", X86Mem128_RC256Operand, 128>;
104-
def vy256mem : X86VMemOperand<VR256, "printymmwordmem", X86Mem256_RC256Operand, 256>;
100+
def vy32mem : X86VMemOperand<VR256, "printdwordmem", X86Mem32_RC256Operand, 32>;
101+
def vy64mem : X86VMemOperand<VR256, "printqwordmem", X86Mem64_RC256Operand, 64>;
105102

103+
def vx32xmem : X86VMemOperand<VR128X, "printdwordmem", X86Mem32_RC128XOperand, 32>;
106104
def vx64xmem : X86VMemOperand<VR128X, "printqwordmem", X86Mem64_RC128XOperand, 64>;
107-
def vx128xmem : X86VMemOperand<VR128X, "printxmmwordmem", X86Mem128_RC128XOperand, 128>;
108-
def vx256xmem : X86VMemOperand<VR128X, "printymmwordmem", X86Mem256_RC128XOperand, 256>;
109-
def vy128xmem : X86VMemOperand<VR256X, "printxmmwordmem", X86Mem128_RC256XOperand, 128>;
110-
def vy256xmem : X86VMemOperand<VR256X, "printymmwordmem", X86Mem256_RC256XOperand, 256>;
111-
def vy512xmem : X86VMemOperand<VR256X, "printzmmwordmem", X86Mem512_RC256XOperand, 512>;
112-
def vz256mem : X86VMemOperand<VR512, "printymmwordmem", X86Mem256_RC512Operand, 256>;
113-
def vz512mem : X86VMemOperand<VR512, "printzmmwordmem", X86Mem512_RC512Operand, 512>;
105+
def vy32xmem : X86VMemOperand<VR256X, "printdwordmem", X86Mem32_RC256XOperand, 32>;
106+
def vy64xmem : X86VMemOperand<VR256X, "printqwordmem", X86Mem64_RC256XOperand, 64>;
107+
def vz32mem : X86VMemOperand<VR512, "printdwordmem", X86Mem32_RC512Operand, 32>;
108+
def vz64mem : X86VMemOperand<VR512, "printqwordmem", X86Mem64_RC512Operand, 64>;
114109

115110
def shmem : X86MemOperand<"printwordmem", X86Mem16AsmOperand>;
116111
def ssmem : X86MemOperand<"printdwordmem", X86Mem32AsmOperand>;

‎llvm/lib/Target/X86/X86InstrSSE.td‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8078,26 +8078,26 @@ let Predicates = [HasAVX2] in {
80788078
= "@earlyclobber $dst,@earlyclobber $mask_wb, $src1 = $dst, $mask = $mask_wb"
80798079
in {
80808080
defm VPGATHERDQ : avx2_gather<0x90, "vpgatherdq",
8081-
VR256, vx128mem, vx256mem>, REX_W;
8081+
VR256, vx64mem, vx64mem>, REX_W;
80828082
defm VPGATHERQQ : avx2_gather<0x91, "vpgatherqq",
8083-
VR256, vx128mem, vy256mem>, REX_W;
8083+
VR256, vx64mem, vy64mem>, REX_W;
80848084
defm VPGATHERDD : avx2_gather<0x90, "vpgatherdd",
8085-
VR256, vx128mem, vy256mem>;
8085+
VR256, vx32mem, vy32mem>;
80868086
defm VPGATHERQD : avx2_gather<0x91, "vpgatherqd",
8087-
VR128, vx64mem, vy128mem>;
8087+
VR128, vx32mem, vy32mem>;
80888088

80898089
let ExeDomain = SSEPackedDouble in {
80908090
defm VGATHERDPD : avx2_gather<0x92, "vgatherdpd",
8091-
VR256, vx128mem, vx256mem>, REX_W;
8091+
VR256, vx64mem, vx64mem>, REX_W;
80928092
defm VGATHERQPD : avx2_gather<0x93, "vgatherqpd",
8093-
VR256, vx128mem, vy256mem>, REX_W;
8093+
VR256, vx64mem, vy64mem>, REX_W;
80948094
}
80958095

80968096
let ExeDomain = SSEPackedSingle in {
80978097
defm VGATHERDPS : avx2_gather<0x92, "vgatherdps",
8098-
VR256, vx128mem, vy256mem>;
8098+
VR256, vx32mem, vy32mem>;
80998099
defm VGATHERQPS : avx2_gather<0x93, "vgatherqps",
8100-
VR128, vx64mem, vy128mem>;
8100+
VR128, vx32mem, vy32mem>;
81018101
}
81028102
}
81038103
}

‎llvm/test/MC/Disassembler/X86/apx/evex-format.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@
9090
## MRM5m
9191

9292
# ATT: vscatterpf0dps (%r16,%zmm0) {%k1}
93-
# INTEL: vscatterpf0dps {k1}, zmmword ptr [r16 + zmm0]
93+
# INTEL: vscatterpf0dps {k1}, dword ptr [r16 + zmm0]
9494
0x62,0xfa,0x7d,0x49,0xc6,0x2c,0x00
9595

9696
# ATT: subq $127, 123(%r16), %r17

‎llvm/test/MC/Disassembler/X86/intel-syntax.txt‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -108,10 +108,10 @@
108108
# CHECK: vshufpd xmm0, xmm1, xmm2, 1
109109
0xc5 0xf1 0xc6 0xc2 0x01
110110

111-
# CHECK: vpgatherqq ymm2, ymmword ptr [rdi + 2*ymm1], ymm0
111+
# CHECK: vpgatherqq ymm2, qword ptr [rdi + 2*ymm1], ymm0
112112
0xc4 0xe2 0xfd 0x91 0x14 0x4f
113113

114-
# CHECK: vpgatherdd xmm10, xmmword ptr [r15 + 2*xmm9], xmm8
114+
# CHECK: vpgatherdd xmm10, dword ptr [r15 + 2*xmm9], xmm8
115115
0xc4 0x02 0x39 0x90 0x14 0x4f
116116

117117
# CHECK: xsave64 [rax]

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