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2 parents 463500c + 7c64790 commit 9871d72Copy full SHA for 9871d72
clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -288,7 +288,7 @@ mlir::Value CIRAttrToValue::visitCirAttr(cir::ConstArrayAttr attr) {
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/// ZeroAttr visitor.
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mlir::Value CIRAttrToValue::visitCirAttr(cir::ZeroAttr attr) {
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- auto loc = parentOp->getLoc();
+ mlir::Location loc = parentOp->getLoc();
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return rewriter.create<mlir::LLVM::ZeroOp>(
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loc, converter->convertType(attr.getType()));
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}
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