1010
1111// CHECK-LE-LABEL: @test_vcreateq_f16(
1212// CHECK-LE-NEXT: entry:
13- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
13+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
1414// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
1515// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x half>
1616// CHECK-LE-NEXT: ret <8 x half> [[TMP2]]
1717//
1818// CHECK-BE-LABEL: @test_vcreateq_f16(
1919// CHECK-BE-NEXT: entry:
20- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
20+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
2121// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
2222// CHECK-BE-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vreinterpretq.v8f16.v2i64(<2 x i64> [[TMP1]])
2323// CHECK-BE-NEXT: ret <8 x half> [[TMP2]]
@@ -29,14 +29,14 @@ float16x8_t test_vcreateq_f16(uint64_t a, uint64_t b)
2929
3030// CHECK-LE-LABEL: @test_vcreateq_f32(
3131// CHECK-LE-NEXT: entry:
32- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
32+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
3333// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
3434// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <4 x float>
3535// CHECK-LE-NEXT: ret <4 x float> [[TMP2]]
3636//
3737// CHECK-BE-LABEL: @test_vcreateq_f32(
3838// CHECK-BE-NEXT: entry:
39- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
39+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
4040// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
4141// CHECK-BE-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vreinterpretq.v4f32.v2i64(<2 x i64> [[TMP1]])
4242// CHECK-BE-NEXT: ret <4 x float> [[TMP2]]
@@ -48,14 +48,14 @@ float32x4_t test_vcreateq_f32(uint64_t a, uint64_t b)
4848
4949// CHECK-LE-LABEL: @test_vcreateq_s16(
5050// CHECK-LE-NEXT: entry:
51- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
51+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
5252// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
5353// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x i16>
5454// CHECK-LE-NEXT: ret <8 x i16> [[TMP2]]
5555//
5656// CHECK-BE-LABEL: @test_vcreateq_s16(
5757// CHECK-BE-NEXT: entry:
58- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
58+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
5959// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
6060// CHECK-BE-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v2i64(<2 x i64> [[TMP1]])
6161// CHECK-BE-NEXT: ret <8 x i16> [[TMP2]]
@@ -67,14 +67,14 @@ int16x8_t test_vcreateq_s16(uint64_t a, uint64_t b)
6767
6868// CHECK-LE-LABEL: @test_vcreateq_s32(
6969// CHECK-LE-NEXT: entry:
70- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
70+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
7171// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
7272// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <4 x i32>
7373// CHECK-LE-NEXT: ret <4 x i32> [[TMP2]]
7474//
7575// CHECK-BE-LABEL: @test_vcreateq_s32(
7676// CHECK-BE-NEXT: entry:
77- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
77+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
7878// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
7979// CHECK-BE-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v2i64(<2 x i64> [[TMP1]])
8080// CHECK-BE-NEXT: ret <4 x i32> [[TMP2]]
@@ -86,7 +86,7 @@ int32x4_t test_vcreateq_s32(uint64_t a, uint64_t b)
8686
8787// CHECK-LABEL: @test_vcreateq_s64(
8888// CHECK-NEXT: entry:
89- // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
89+ // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
9090// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
9191// CHECK-NEXT: ret <2 x i64> [[TMP1]]
9292//
@@ -97,14 +97,14 @@ int64x2_t test_vcreateq_s64(uint64_t a, uint64_t b)
9797
9898// CHECK-LE-LABEL: @test_vcreateq_s8(
9999// CHECK-LE-NEXT: entry:
100- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
100+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
101101// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
102102// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>
103103// CHECK-LE-NEXT: ret <16 x i8> [[TMP2]]
104104//
105105// CHECK-BE-LABEL: @test_vcreateq_s8(
106106// CHECK-BE-NEXT: entry:
107- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
107+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
108108// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
109109// CHECK-BE-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vreinterpretq.v16i8.v2i64(<2 x i64> [[TMP1]])
110110// CHECK-BE-NEXT: ret <16 x i8> [[TMP2]]
@@ -116,14 +116,14 @@ int8x16_t test_vcreateq_s8(uint64_t a, uint64_t b)
116116
117117// CHECK-LE-LABEL: @test_vcreateq_u16(
118118// CHECK-LE-NEXT: entry:
119- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
119+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
120120// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
121121// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x i16>
122122// CHECK-LE-NEXT: ret <8 x i16> [[TMP2]]
123123//
124124// CHECK-BE-LABEL: @test_vcreateq_u16(
125125// CHECK-BE-NEXT: entry:
126- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
126+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
127127// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
128128// CHECK-BE-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v2i64(<2 x i64> [[TMP1]])
129129// CHECK-BE-NEXT: ret <8 x i16> [[TMP2]]
@@ -135,14 +135,14 @@ uint16x8_t test_vcreateq_u16(uint64_t a, uint64_t b)
135135
136136// CHECK-LE-LABEL: @test_vcreateq_u32(
137137// CHECK-LE-NEXT: entry:
138- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
138+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
139139// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
140140// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <4 x i32>
141141// CHECK-LE-NEXT: ret <4 x i32> [[TMP2]]
142142//
143143// CHECK-BE-LABEL: @test_vcreateq_u32(
144144// CHECK-BE-NEXT: entry:
145- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
145+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
146146// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
147147// CHECK-BE-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v2i64(<2 x i64> [[TMP1]])
148148// CHECK-BE-NEXT: ret <4 x i32> [[TMP2]]
@@ -154,7 +154,7 @@ uint32x4_t test_vcreateq_u32(uint64_t a, uint64_t b)
154154
155155// CHECK-LABEL: @test_vcreateq_u64(
156156// CHECK-NEXT: entry:
157- // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
157+ // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
158158// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
159159// CHECK-NEXT: ret <2 x i64> [[TMP1]]
160160//
@@ -165,14 +165,14 @@ uint64x2_t test_vcreateq_u64(uint64_t a, uint64_t b)
165165
166166// CHECK-LE-LABEL: @test_vcreateq_u8(
167167// CHECK-LE-NEXT: entry:
168- // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
168+ // CHECK-LE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
169169// CHECK-LE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
170170// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <16 x i8>
171171// CHECK-LE-NEXT: ret <16 x i8> [[TMP2]]
172172//
173173// CHECK-BE-LABEL: @test_vcreateq_u8(
174174// CHECK-BE-NEXT: entry:
175- // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef , i64 [[A:%.*]], i64 0
175+ // CHECK-BE-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison , i64 [[A:%.*]], i64 0
176176// CHECK-BE-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
177177// CHECK-BE-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vreinterpretq.v16i8.v2i64(<2 x i64> [[TMP1]])
178178// CHECK-BE-NEXT: ret <16 x i8> [[TMP2]]
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