[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

- Remove calls to pass initialization from pass constructors.
- llvm/llvm-project#111767

Author: jurahul

llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp

@@ -38,9 +38,7 @@ ImmutablePass *llvm::createAMDGPUExternalAAWrapperPass() {
   return new AMDGPUExternalAAWrapper();
 }
 
-AMDGPUAAWrapperPass::AMDGPUAAWrapperPass() : ImmutablePass(ID) {
-  initializeAMDGPUAAWrapperPassPass(*PassRegistry::getPassRegistry());
-}
+AMDGPUAAWrapperPass::AMDGPUAAWrapperPass() : ImmutablePass(ID) {}
 
 void AMDGPUAAWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesAll();

llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

@@ -17,15 +17,12 @@
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/IntrinsicsAMDGPU.h"
 #include "llvm/IR/IntrinsicsR600.h"
+#include "llvm/InitializePasses.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Transforms/IPO/Attributor.h"
 
 #define DEBUG_TYPE "amdgpu-attributor"
 
-namespace llvm {
-void initializeCycleInfoWrapperPassPass(PassRegistry &);
-} // namespace llvm
-
 using namespace llvm;
 
 static cl::opt<unsigned> KernargPreloadCount(

llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

@@ -336,9 +336,7 @@ class AMDGPUCodeGenPrepareImpl
 class AMDGPUCodeGenPrepare : public FunctionPass {
 public:
   static char ID;
-  AMDGPUCodeGenPrepare() : FunctionPass(ID) {
-    initializeAMDGPUCodeGenPreparePass(*PassRegistry::getPassRegistry());
-  }
+  AMDGPUCodeGenPrepare() : FunctionPass(ID) {}
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<AssumptionCacheTracker>();
     AU.addRequired<UniformityInfoWrapperPass>();

llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp

@@ -139,10 +139,7 @@ void ExportClustering::apply(ScheduleDAGInstrs *DAG) {
 
 } // end namespace
 
-namespace llvm {
-
-std::unique_ptr<ScheduleDAGMutation> createAMDGPUExportClusteringDAGMutation() {
+std::unique_ptr<ScheduleDAGMutation>
+llvm::createAMDGPUExportClusteringDAGMutation() {
   return std::make_unique<ExportClustering>();
 }
-
-} // end namespace llvm

llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp

@@ -34,10 +34,7 @@ class AMDGPUGlobalISelDivergenceLowering : public MachineFunctionPass {
   static char ID;
 
 public:
-  AMDGPUGlobalISelDivergenceLowering() : MachineFunctionPass(ID) {
-    initializeAMDGPUGlobalISelDivergenceLoweringPass(
-        *PassRegistry::getPassRegistry());
-  }
+  AMDGPUGlobalISelDivergenceLowering() : MachineFunctionPass(ID) {}
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

@@ -2696,16 +2696,12 @@ bool IGroupLPDAGMutation::initIGLPOpt(SUnit &SU) {
 
 } // namespace
 
-namespace llvm {
-
 /// \p Phase specifes whether or not this is a reentry into the
 /// IGroupLPDAGMutation. Since there may be multiple scheduling passes on the
 /// same scheduling region (e.g. pre and post-RA scheduling / multiple
 /// scheduling "phases"), we can reenter this mutation framework more than once
 /// for a given region.
 std::unique_ptr<ScheduleDAGMutation>
-createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) {
+llvm::createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) {
   return std::make_unique<IGroupLPDAGMutation>(Phase);
 }
-
-} // end namespace llvm

llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp

@@ -2312,10 +2312,7 @@ class AMDGPULowerBufferFatPointers : public ModulePass {
 public:
   static char ID;
 
-  AMDGPULowerBufferFatPointers() : ModulePass(ID) {
-    initializeAMDGPULowerBufferFatPointersPass(
-        *PassRegistry::getPassRegistry());
-  }
+  AMDGPULowerBufferFatPointers() : ModulePass(ID) {}
 
   bool run(Module &M, const TargetMachine &TM);
   bool runOnModule(Module &M) override;

llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp

@@ -1502,10 +1502,8 @@ class AMDGPULowerModuleLDSLegacy : public ModulePass {
   const AMDGPUTargetMachine *TM;
   static char ID;
 
-  AMDGPULowerModuleLDSLegacy(const AMDGPUTargetMachine *TM_ = nullptr)
-      : ModulePass(ID), TM(TM_) {
-    initializeAMDGPULowerModuleLDSLegacyPass(*PassRegistry::getPassRegistry());
-  }
+  AMDGPULowerModuleLDSLegacy(const AMDGPUTargetMachine *TM = nullptr)
+      : ModulePass(ID), TM(TM) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     if (!TM)

llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp

@@ -15,7 +15,7 @@
 #include "AMDGPUMachineModuleInfo.h"
 #include "llvm/IR/Module.h"
 
-namespace llvm {
+using namespace llvm;
 
 AMDGPUMachineModuleInfo::AMDGPUMachineModuleInfo(const MachineModuleInfo &MMI)
     : MachineModuleInfoELF(MMI) {
@@ -34,5 +34,3 @@ AMDGPUMachineModuleInfo::AMDGPUMachineModuleInfo(const MachineModuleInfo &MMI)
   SingleThreadOneAddressSpaceSSID =
       CTX.getOrInsertSyncScopeID("singlethread-one-as");
 }
-
-} // end namespace llvm

llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp

@@ -42,10 +42,7 @@ class AMDGPUMarkLastScratchLoadLegacy : public MachineFunctionPass {
 public:
   static char ID;
 
-  AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {
-    initializeAMDGPUMarkLastScratchLoadLegacyPass(
-        *PassRegistry::getPassRegistry());
-  }
+  AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {}
 
   bool runOnMachineFunction(MachineFunction &MF) override;