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Automerge: [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add MMX/SSE/AVX/AVX512 PMULHRSW intrinsics to be used in constexpr (#160636)
This PR resolves #155805 and updates the following builtins to handle constant expressions: ``` _mm_mulhrs_pi16 mm_mulhrs_epi16 mm256_mulhrs_epi16 mm512_mulhrs_epi16 ```
2 parents 67e7cd4 + ee530f0 commit a65c13b

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12 files changed

+52
-31
lines changed

12 files changed

+52
-31
lines changed

‎clang/include/clang/Basic/BuiltinsX86.td‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -124,13 +124,13 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in {
124124
}
125125

126126
let Features = "ssse3" in {
127-
def pmulhrsw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
128127
def psignb128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>)">;
129128
def psignw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
130129
def psignd128 : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Vector<4, int>)">;
131130
}
132131

133132
let Features = "ssse3", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
133+
def pmulhrsw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
134134
def pmaddubsw128 : X86Builtin<"_Vector<8, short>(_Vector<16, char>, _Vector<16, char>)">;
135135
def pshufb128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>)">;
136136
}
@@ -608,7 +608,6 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
608608
def palignr256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>, _Constant int)">;
609609

610610
def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
611-
def pmulhrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
612611
def psadbw256 : X86Builtin<"_Vector<4, long long int>(_Vector<32, char>, _Vector<32, char>)">;
613612
def psignb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>)">;
614613
def psignw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
@@ -661,6 +660,7 @@ let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWi
661660
def psrawi256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, int)">;
662661
def psradi256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, int)">;
663662

663+
def pmulhrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
664664
def pmulhuw256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, unsigned short>, _Vector<16, unsigned short>)">;
665665
def pmulhw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
666666

@@ -1386,13 +1386,10 @@ let Features = "avx512bitalg", Attributes = [NoThrow, Const, RequiredVectorWidth
13861386
def vpshufbitqmb512_mask : X86Builtin<"unsigned long long int(_Vector<64, char>, _Vector<64, char>, unsigned long long int)">;
13871387
}
13881388

1389-
let Features = "avx512bw", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
1390-
def pmulhrsw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
1391-
}
1392-
13931389
let Features = "avx512bw", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
13941390
def pavgb512 : X86Builtin<"_Vector<64, unsigned char>(_Vector<64, unsigned char>, _Vector<64, unsigned char>)">;
13951391
def pavgw512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, unsigned short>, _Vector<32, unsigned short>)">;
1392+
def pmulhrsw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
13961393
def pmulhuw512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, unsigned short>, _Vector<32, unsigned short>)">;
13971394
def pmulhw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
13981395
}

‎clang/lib/AST/ByteCode/InterpBuiltin.cpp‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3621,6 +3621,15 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
36213621
return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
36223622
});
36233623

3624+
case clang::X86::BI__builtin_ia32_pmulhrsw128:
3625+
case clang::X86::BI__builtin_ia32_pmulhrsw256:
3626+
case clang::X86::BI__builtin_ia32_pmulhrsw512:
3627+
return interp__builtin_elementwise_int_binop(
3628+
S, OpPC, Call, [](const APSInt &LHS, const APSInt &RHS) {
3629+
return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
3630+
.extractBits(16, 1);
3631+
});
3632+
36243633
case clang::X86::BI__builtin_ia32_pavgb128:
36253634
case clang::X86::BI__builtin_ia32_pavgw128:
36263635
case clang::X86::BI__builtin_ia32_pavgb256:

‎clang/lib/AST/ExprConstant.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11819,6 +11819,14 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1181911819
case clang::X86::BI__builtin_ia32_pavgw512:
1182011820
return EvaluateBinOpExpr(llvm::APIntOps::avgCeilU);
1182111821

11822+
case clang::X86::BI__builtin_ia32_pmulhrsw128:
11823+
case clang::X86::BI__builtin_ia32_pmulhrsw256:
11824+
case clang::X86::BI__builtin_ia32_pmulhrsw512:
11825+
return EvaluateBinOpExpr([](const APSInt &LHS, const APSInt &RHS) {
11826+
return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
11827+
.extractBits(16, 1);
11828+
});
11829+
1182211830
case clang::X86::BI__builtin_ia32_pmaddubsw128:
1182311831
case clang::X86::BI__builtin_ia32_pmaddubsw256:
1182411832
case clang::X86::BI__builtin_ia32_pmaddubsw512:

‎clang/lib/Headers/avx2intrin.h‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1650,9 +1650,8 @@ _mm256_mul_epi32(__m256i __a, __m256i __b) {
16501650
/// \param __b
16511651
/// A 256-bit vector of [16 x i16] containing one of the source operands.
16521652
/// \returns A 256-bit vector of [16 x i16] containing the rounded products.
1653-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1654-
_mm256_mulhrs_epi16(__m256i __a, __m256i __b)
1655-
{
1653+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1654+
_mm256_mulhrs_epi16(__m256i __a, __m256i __b) {
16561655
return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);
16571656
}
16581657

@@ -1670,8 +1669,7 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b)
16701669
/// A 256-bit vector of [16 x i16] containing one of the source operands.
16711670
/// \returns A 256-bit vector of [16 x i16] containing the products.
16721671
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1673-
_mm256_mulhi_epu16(__m256i __a, __m256i __b)
1674-
{
1672+
_mm256_mulhi_epu16(__m256i __a, __m256i __b) {
16751673
return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b);
16761674
}
16771675

‎clang/lib/Headers/avx512bwintrin.h‎

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1003,23 +1003,20 @@ _mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I,
10031003
(__v32hi)_mm512_setzero_si512());
10041004
}
10051005

1006-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
1007-
_mm512_mulhrs_epi16(__m512i __A, __m512i __B)
1008-
{
1006+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1007+
_mm512_mulhrs_epi16(__m512i __A, __m512i __B) {
10091008
return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B);
10101009
}
10111010

1012-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
1013-
_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1014-
{
1011+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1012+
_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
10151013
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
10161014
(__v32hi)_mm512_mulhrs_epi16(__A, __B),
10171015
(__v32hi)__W);
10181016
}
10191017

1020-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
1021-
_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1022-
{
1018+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1019+
_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
10231020
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
10241021
(__v32hi)_mm512_mulhrs_epi16(__A, __B),
10251022
(__v32hi)_mm512_setzero_si512());

‎clang/lib/Headers/avx512vlbwintrin.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1510,28 +1510,28 @@ _mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)
15101510
__builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M);
15111511
}
15121512

1513-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
1513+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
15141514
_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
15151515
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
15161516
(__v8hi)_mm_mulhrs_epi16(__X, __Y),
15171517
(__v8hi)__W);
15181518
}
15191519

1520-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
1520+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
15211521
_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
15221522
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
15231523
(__v8hi)_mm_mulhrs_epi16(__X, __Y),
15241524
(__v8hi)_mm_setzero_si128());
15251525
}
15261526

1527-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1527+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
15281528
_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {
15291529
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
15301530
(__v16hi)_mm256_mulhrs_epi16(__X, __Y),
15311531
(__v16hi)__W);
15321532
}
15331533

1534-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1534+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
15351535
_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
15361536
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
15371537
(__v16hi)_mm256_mulhrs_epi16(__X, __Y),

‎clang/lib/Headers/tmmintrin.h‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -544,8 +544,8 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b) {
544544
/// A 128-bit vector of [8 x i16] containing one of the source operands.
545545
/// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
546546
/// products of both operands.
547-
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhrs_epi16(__m128i __a,
548-
__m128i __b) {
547+
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
548+
_mm_mulhrs_epi16(__m128i __a, __m128i __b) {
549549
return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
550550
}
551551

@@ -563,11 +563,10 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhrs_epi16(__m128i __a,
563563
/// A 64-bit vector of [4 x i16] containing one of the source operands.
564564
/// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled
565565
/// products of both operands.
566-
static __inline__ __m64 __DEFAULT_FN_ATTRS
567-
_mm_mulhrs_pi16(__m64 __a, __m64 __b)
568-
{
569-
return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__anyext128(__a),
570-
(__v8hi)__anyext128(__b)));
566+
static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
567+
_mm_mulhrs_pi16(__m64 __a, __m64 __b) {
568+
return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__zext128(__a),
569+
(__v8hi)__zext128(__b)));
571570
}
572571

573572
/// Copies the 8-bit integers from a 128-bit integer vector to the

‎clang/test/CodeGen/X86/avx2-builtins.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1038,6 +1038,7 @@ __m256i test_mm256_mulhrs_epi16(__m256i a, __m256i b) {
10381038
// CHECK: call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %{{.*}}, <16 x i16> %{{.*}})
10391039
return _mm256_mulhrs_epi16(a, b);
10401040
}
1041+
TEST_CONSTEXPR(match_v16hi(_mm256_mulhrs_epi16((__m256i)(__v16hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600}, (__m256i)(__v16hi){+1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +5, -9, -13, +16, +18, -20, -21, -22, -22, +21, +20, -18, -16, +13, +9, -5));
10411042

10421043
__m256i test_mm256_mullo_epi16(__m256i a, __m256i b) {
10431044
// CHECK-LABEL: test_mm256_mullo_epi16

‎clang/test/CodeGen/X86/avx512bw-builtins.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1596,18 +1596,24 @@ __m512i test_mm512_mulhrs_epi16(__m512i __A, __m512i __B) {
15961596
// CHECK: @llvm.x86.avx512.pmul.hr.sw.512
15971597
return _mm512_mulhrs_epi16(__A,__B);
15981598
}
1599+
TEST_CONSTEXPR(match_v32hi(_mm512_mulhrs_epi16((__m512i)(__v32hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600, -1700, -1800, +1900, +2000, -2100, -2200, +2300, +2400, -2500, -2600, +2700, +2800, -2900, -3000, +3100, +3200}, (__m512i)(__v32hi){+3200, -3100, +3000, -2900, +2800, -2700, +2600, -2500, +2400, -2300, +2200, -2100, +2000, -1900, +1800, -1700, +1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +10, -19, -27, +35, +43, -49, -56, -61, -66, +70, +74, -77, -79, +81, +82, -83, -83, +82, +81, -79, -77, +74, +70, -66, -61, +56, +49, -43, -35, +27, +19, -10));
1600+
15991601
__m512i test_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
16001602
// CHECK-LABEL: test_mm512_mask_mulhrs_epi16
16011603
// CHECK: @llvm.x86.avx512.pmul.hr.sw.512
16021604
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
16031605
return _mm512_mask_mulhrs_epi16(__W,__U,__A,__B);
16041606
}
1607+
TEST_CONSTEXPR(match_v32hi(_mm512_mask_mulhrs_epi16(_mm512_set1_epi16(1), 0x0000FFFF, (__m512i)(__v32hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600, -1700, -1800, +1900, +2000, -2100, -2200, +2300, +2400, -2500, -2600, +2700, +2800, -2900, -3000, +3100, +3200}, (__m512i)(__v32hi){+3200, -3100, +3000, -2900, +2800, -2700, +2600, -2500, +2400, -2300, +2200, -2100, +2000, -1900, +1800, -1700, +1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +10, -19, -27, +35, +43, -49, -56, -61, -66, +70, +74, -77, -79, +81, +82, -83, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1, +1));
1608+
16051609
__m512i test_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
16061610
// CHECK-LABEL: test_mm512_maskz_mulhrs_epi16
16071611
// CHECK: @llvm.x86.avx512.pmul.hr.sw.512
16081612
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
16091613
return _mm512_maskz_mulhrs_epi16(__U,__A,__B);
16101614
}
1615+
TEST_CONSTEXPR(match_v32hi(_mm512_maskz_mulhrs_epi16(0x0000FFFF, (__m512i)(__v32hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600, -1700, -1800, +1900, +2000, -2100, -2200, +2300, +2400, -2500, -2600, +2700, +2800, -2900, -3000, +3100, +3200}, (__m512i)(__v32hi){+3200, -3100, +3000, -2900, +2800, -2700, +2600, -2500, +2400, -2300, +2200, -2100, +2000, -1900, +1800, -1700, +1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +10, -19, -27, +35, +43, -49, -56, -61, -66, +70, +74, -77, -79, +81, +82, -83, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
1616+
16111617
__m512i test_mm512_mulhi_epi16(__m512i __A, __m512i __B) {
16121618
// CHECK-LABEL: test_mm512_mulhi_epi16
16131619
// CHECK: @llvm.x86.avx512.pmulh.w.512

‎clang/test/CodeGen/X86/avx512vlbw-builtins.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2061,27 +2061,31 @@ __m128i test_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128
20612061
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
20622062
return _mm_mask_mulhrs_epi16(__W, __U, __X, __Y);
20632063
}
2064+
TEST_CONSTEXPR(match_v8hi(_mm_mask_mulhrs_epi16(_mm_set1_epi16(1), 0x0F, (__m128i)(__v8hi){+100, +200, -300, -400, +500, +600, -700, +800}, (__m128i)(__v8hi){+8000, -7000, +6000, -5000, +4000, -3000, +2000, -1000}), +24, -43, -55, +61, +1, +1, +1, +1));
20642065

20652066
__m128i test_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
20662067
// CHECK-LABEL: test_mm_maskz_mulhrs_epi16
20672068
// CHECK: @llvm.x86.ssse3.pmul.hr.sw
20682069
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
20692070
return _mm_maskz_mulhrs_epi16(__U, __X, __Y);
20702071
}
2072+
TEST_CONSTEXPR(match_v8hi(_mm_maskz_mulhrs_epi16(0x0F, (__m128i)(__v8hi){+100, +200, -300, -400, +500, +600, -700, +800}, (__m128i)(__v8hi){+8000, -7000, +6000, -5000, +4000, -3000, +2000, -1000}), +24, -43, -55, +61, 0, 0, 0, 0));
20712073

20722074
__m256i test_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {
20732075
// CHECK-LABEL: test_mm256_mask_mulhrs_epi16
20742076
// CHECK: @llvm.x86.avx2.pmul.hr.sw
20752077
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
20762078
return _mm256_mask_mulhrs_epi16(__W, __U, __X, __Y);
20772079
}
2080+
TEST_CONSTEXPR(match_v16hi(_mm256_mask_mulhrs_epi16(_mm256_set1_epi16(1), 0xF00F, (__m256i)(__v16hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600}, (__m256i)(__v16hi){+1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +5, -9, -13, +16, +1, +1, +1, +1, +1, +1, +1, +1, -16, +13, +9, -5));
20782081

20792082
__m256i test_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
20802083
// CHECK-LABEL: test_mm256_maskz_mulhrs_epi16
20812084
// CHECK: @llvm.x86.avx2.pmul.hr.sw
20822085
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
20832086
return _mm256_maskz_mulhrs_epi16(__U, __X, __Y);
20842087
}
2088+
TEST_CONSTEXPR(match_v16hi(_mm256_maskz_mulhrs_epi16(0xF00F, (__m256i)(__v16hi){+100, +200, -300, -400, +500, +600, -700, +800, -900, -1000, +1100, +1200, -1300, -1400, +1500, +1600}, (__m256i)(__v16hi){+1600, -1500, +1400, -1300, +1200, -1100, +1000, -900, +800, -700, +600, -500, +400, -300, +200, -100}), +5, -9, -13, +16, 0, 0, 0, 0, 0, 0, 0, 0, -16, +13, +9, -5));
20852089

20862090
__m128i test_mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
20872091
// CHECK-LABEL: test_mm_mask_mulhi_epu16

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