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MCAsmBackend: Simplify shouldForceRelocation overrides
1 parent dd28915 commit b59763a

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8 files changed

+74
-102
lines changed

8 files changed

+74
-102
lines changed

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp‎

Lines changed: 17 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -93,8 +93,6 @@ class AArch64AsmBackend : public MCAsmBackend {
9393
const MCSubtargetInfo *STI) const override;
9494

9595
unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
96-
97-
bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target);
9896
};
9997

10098
} // end anonymous namespace
@@ -411,11 +409,27 @@ unsigned AArch64AsmBackend::getFixupKindContainereSizeInBytes(unsigned Kind) con
411409
}
412410
}
413411

412+
static bool shouldForceRelocation(const MCFixup &Fixup) {
413+
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
414+
// ~0xfff. This means that the required offset to reach a symbol can vary by
415+
// up to one step depending on where the ADRP is in memory. For example:
416+
//
417+
// ADRP x0, there
418+
// there:
419+
//
420+
// If the ADRP occurs at address 0xffc then "there" will be at 0x1000 and
421+
// we'll need that as an offset. At any other address "there" will be in the
422+
// same page as the ADRP and the instruction should encode 0x0. Assuming the
423+
// section isn't 0x1000-aligned, we therefore need to delegate this decision
424+
// to the linker -- a relocation!
425+
return Fixup.getTargetKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21;
426+
}
427+
414428
void AArch64AsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
415429
const MCValue &Target,
416430
MutableArrayRef<char> Data, uint64_t Value,
417431
bool IsResolved) {
418-
if (IsResolved && shouldForceRelocation(Fixup, Target))
432+
if (shouldForceRelocation(Fixup))
419433
IsResolved = false;
420434
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
421435
MCFixupKind Kind = Fixup.getKind();
@@ -517,23 +531,6 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
517531
return true;
518532
}
519533

520-
bool AArch64AsmBackend::shouldForceRelocation(const MCFixup &Fixup,
521-
const MCValue &Target) {
522-
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
523-
// ~0xfff. This means that the required offset to reach a symbol can vary by
524-
// up to one step depending on where the ADRP is in memory. For example:
525-
//
526-
// ADRP x0, there
527-
// there:
528-
//
529-
// If the ADRP occurs at address 0xffc then "there" will be at 0x1000 and
530-
// we'll need that as an offset. At any other address "there" will be in the
531-
// same page as the ADRP and the instruction should encode 0x0. Assuming the
532-
// section isn't 0x1000-aligned, we therefore need to delegate this decision
533-
// to the linker -- a relocation!
534-
return Fixup.getTargetKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21;
535-
}
536-
537534
namespace {
538535

539536
namespace CU {

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,6 @@ class AMDGPUAsmBackend : public MCAsmBackend {
5050

5151
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
5252
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
53-
bool shouldForceRelocation(const MCFixup &, const MCValue &);
5453
};
5554

5655
} //End anonymous namespace
@@ -134,7 +133,7 @@ void AMDGPUAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
134133
const MCValue &Target,
135134
MutableArrayRef<char> Data, uint64_t Value,
136135
bool IsResolved) {
137-
if (IsResolved && shouldForceRelocation(Fixup, Target))
136+
if (Target.getSpecifier())
138137
IsResolved = false;
139138
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
140139
if (mc::isRelocation(Fixup.getKind()))
@@ -191,11 +190,6 @@ MCFixupKindInfo AMDGPUAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
191190
return Infos[Kind - FirstTargetFixupKind];
192191
}
193192

194-
bool AMDGPUAsmBackend::shouldForceRelocation(const MCFixup &,
195-
const MCValue &Target) {
196-
return Target.getSpecifier();
197-
}
198-
199193
unsigned AMDGPUAsmBackend::getMinimumNopSize() const {
200194
return 4;
201195
}

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ class HexagonAsmBackend : public MCAsmBackend {
198198
return Infos[Kind - FirstTargetFixupKind];
199199
}
200200

201-
bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target) {
201+
bool shouldForceRelocation(const MCFixup &Fixup) {
202202
switch(Fixup.getTargetKind()) {
203203
default:
204204
llvm_unreachable("Unknown Fixup Kind!");
@@ -656,7 +656,7 @@ void HexagonAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
656656
const MCValue &Target,
657657
MutableArrayRef<char> Data,
658658
uint64_t FixupValue, bool IsResolved) {
659-
if (IsResolved && shouldForceRelocation(Fixup, Target))
659+
if (IsResolved && shouldForceRelocation(Fixup))
660660
IsResolved = false;
661661
maybeAddReloc(F, Fixup, Target, FixupValue, IsResolved);
662662
// When FixupValue is 0 the relocation is external and there

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp‎

Lines changed: 42 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -239,14 +239,55 @@ static unsigned calculateMMLEIndex(unsigned i) {
239239
return (1 - i / 2) * 2 + i % 2;
240240
}
241241

242+
static bool shouldForceRelocation(const MCFixup &Fixup) {
243+
const unsigned FixupKind = Fixup.getKind();
244+
switch (FixupKind) {
245+
default:
246+
return false;
247+
// All these relocations require special processing
248+
// at linking time. Delegate this work to a linker.
249+
case Mips::fixup_Mips_CALL_HI16:
250+
case Mips::fixup_Mips_CALL_LO16:
251+
case Mips::fixup_Mips_CALL16:
252+
case Mips::fixup_Mips_GOT:
253+
case Mips::fixup_Mips_GOT_PAGE:
254+
case Mips::fixup_Mips_GOT_OFST:
255+
case Mips::fixup_Mips_GOT_DISP:
256+
case Mips::fixup_Mips_GOT_HI16:
257+
case Mips::fixup_Mips_GOT_LO16:
258+
case Mips::fixup_Mips_GOTTPREL:
259+
case Mips::fixup_Mips_DTPREL_HI:
260+
case Mips::fixup_Mips_DTPREL_LO:
261+
case Mips::fixup_Mips_TLSGD:
262+
case Mips::fixup_Mips_TLSLDM:
263+
case Mips::fixup_Mips_TPREL_HI:
264+
case Mips::fixup_Mips_TPREL_LO:
265+
case Mips::fixup_Mips_JALR:
266+
case Mips::fixup_MICROMIPS_CALL16:
267+
case Mips::fixup_MICROMIPS_GOT_DISP:
268+
case Mips::fixup_MICROMIPS_GOT_PAGE:
269+
case Mips::fixup_MICROMIPS_GOT_OFST:
270+
case Mips::fixup_MICROMIPS_GOT16:
271+
case Mips::fixup_MICROMIPS_GOTTPREL:
272+
case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
273+
case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
274+
case Mips::fixup_MICROMIPS_TLS_GD:
275+
case Mips::fixup_MICROMIPS_TLS_LDM:
276+
case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
277+
case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
278+
case Mips::fixup_MICROMIPS_JALR:
279+
return true;
280+
}
281+
}
282+
242283
/// ApplyFixup - Apply the \p Value for given \p Fixup into the provided
243284
/// data fragment, at the offset specified by the fixup and following the
244285
/// fixup kind as appropriate.
245286
void MipsAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
246287
const MCValue &Target,
247288
MutableArrayRef<char> Data, uint64_t Value,
248289
bool IsResolved) {
249-
if (IsResolved && shouldForceRelocation(Fixup, Target))
290+
if (shouldForceRelocation(Fixup))
250291
IsResolved = false;
251292
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
252293
MCFixupKind Kind = Fixup.getKind();
@@ -559,48 +600,6 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
559600
return true;
560601
}
561602

562-
bool MipsAsmBackend::shouldForceRelocation(const MCFixup &Fixup,
563-
const MCValue &Target) {
564-
const unsigned FixupKind = Fixup.getKind();
565-
switch (FixupKind) {
566-
default:
567-
return false;
568-
// All these relocations require special processing
569-
// at linking time. Delegate this work to a linker.
570-
case Mips::fixup_Mips_CALL_HI16:
571-
case Mips::fixup_Mips_CALL_LO16:
572-
case Mips::fixup_Mips_CALL16:
573-
case Mips::fixup_Mips_GOT:
574-
case Mips::fixup_Mips_GOT_PAGE:
575-
case Mips::fixup_Mips_GOT_OFST:
576-
case Mips::fixup_Mips_GOT_DISP:
577-
case Mips::fixup_Mips_GOT_HI16:
578-
case Mips::fixup_Mips_GOT_LO16:
579-
case Mips::fixup_Mips_GOTTPREL:
580-
case Mips::fixup_Mips_DTPREL_HI:
581-
case Mips::fixup_Mips_DTPREL_LO:
582-
case Mips::fixup_Mips_TLSGD:
583-
case Mips::fixup_Mips_TLSLDM:
584-
case Mips::fixup_Mips_TPREL_HI:
585-
case Mips::fixup_Mips_TPREL_LO:
586-
case Mips::fixup_Mips_JALR:
587-
case Mips::fixup_MICROMIPS_CALL16:
588-
case Mips::fixup_MICROMIPS_GOT_DISP:
589-
case Mips::fixup_MICROMIPS_GOT_PAGE:
590-
case Mips::fixup_MICROMIPS_GOT_OFST:
591-
case Mips::fixup_MICROMIPS_GOT16:
592-
case Mips::fixup_MICROMIPS_GOTTPREL:
593-
case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
594-
case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
595-
case Mips::fixup_MICROMIPS_TLS_GD:
596-
case Mips::fixup_MICROMIPS_TLS_LDM:
597-
case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
598-
case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
599-
case Mips::fixup_MICROMIPS_JALR:
600-
return true;
601-
}
602-
}
603-
604603
namespace {
605604

606605
class WindowsMipsAsmBackend : public MipsAsmBackend {

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,6 @@ class MipsAsmBackend : public MCAsmBackend {
4848

4949
bool writeNopData(raw_ostream &OS, uint64_t Count,
5050
const MCSubtargetInfo *STI) const override;
51-
52-
bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target);
5351
}; // class MipsAsmBackend
5452

5553
} // namespace

‎llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,6 @@ class SystemZMCAsmBackend : public MCAsmBackend {
113113
// Override MCAsmBackend
114114
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
115115
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
116-
bool shouldForceRelocation(const MCFixup &, const MCValue &);
117116
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
118117
MutableArrayRef<char> Data, uint64_t Value,
119118
bool IsResolved) override;
@@ -153,16 +152,11 @@ MCFixupKindInfo SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
153152
return SystemZ::MCFixupKindInfos[Kind - FirstTargetFixupKind];
154153
}
155154

156-
bool SystemZMCAsmBackend::shouldForceRelocation(const MCFixup &,
157-
const MCValue &Target) {
158-
return Target.getSpecifier();
159-
}
160-
161155
void SystemZMCAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
162156
const MCValue &Target,
163157
MutableArrayRef<char> Data, uint64_t Value,
164158
bool IsResolved) {
165-
if (IsResolved && shouldForceRelocation(Fixup, Target))
159+
if (Target.getSpecifier())
166160
IsResolved = false;
167161
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
168162
MCFixupKind Kind = Fixup.getKind();

‎llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp‎

Lines changed: 7 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -122,18 +122,6 @@ class VEAsmBackend : public MCAsmBackend {
122122
return Infos[Kind - FirstTargetFixupKind];
123123
}
124124

125-
bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target) {
126-
switch ((VE::Fixups)Fixup.getKind()) {
127-
default:
128-
return false;
129-
case VE::fixup_ve_tls_gd_hi32:
130-
case VE::fixup_ve_tls_gd_lo32:
131-
case VE::fixup_ve_tpoff_hi32:
132-
case VE::fixup_ve_tpoff_lo32:
133-
return true;
134-
}
135-
}
136-
137125
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &,
138126
MutableArrayRef<char>, uint64_t Value,
139127
bool IsResolved) override;
@@ -183,8 +171,14 @@ class ELFVEAsmBackend : public VEAsmBackend {
183171
void VEAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
184172
const MCValue &Target, MutableArrayRef<char> Data,
185173
uint64_t Value, bool IsResolved) {
186-
if (IsResolved && shouldForceRelocation(Fixup, Target))
174+
switch (Fixup.getTargetKind()) {
175+
case VE::fixup_ve_tls_gd_hi32:
176+
case VE::fixup_ve_tls_gd_lo32:
177+
case VE::fixup_ve_tpoff_hi32:
178+
case VE::fixup_ve_tpoff_lo32:
187179
IsResolved = false;
180+
break;
181+
}
188182
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
189183
Value = adjustFixupValue(Fixup.getKind(), Value);
190184
if (!Value)

‎llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -687,20 +687,16 @@ static unsigned getFixupKindSize(unsigned Kind) {
687687
}
688688
}
689689

690-
// Force relocation when there is a specifier. This might be too conservative -
691-
// GAS doesn't emit a relocation for call local@plt; local:.
692-
bool X86AsmBackend::shouldForceRelocation(const MCFixup &,
693-
const MCValue &Target) {
694-
return Target.getSpecifier();
695-
}
696-
697690
void X86AsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
698691
const MCValue &Target,
699692
MutableArrayRef<char> Data, uint64_t Value,
700693
bool IsResolved) {
701-
if (IsResolved && shouldForceRelocation(Fixup, Target))
694+
// Force relocation when there is a specifier. This might be too conservative
695+
// - GAS doesn't emit a relocation for call local@plt; local:.
696+
if (Target.getSpecifier())
702697
IsResolved = false;
703698
maybeAddReloc(F, Fixup, Target, Value, IsResolved);
699+
704700
auto Kind = Fixup.getKind();
705701
if (mc::isRelocation(Kind))
706702
return;

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