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[AArch64] Use getMergeValues to simplify code. NFC (#150337)
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4223,7 +4223,6 @@ static SDValue lowerADDSUBO_CARRY(SDValue Op, SelectionDAG &DAG,
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SDValue OpCarryIn = valueToCarryFlag(Op.getOperand(2), DAG, InvertCarry);
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SDLoc DL(Op);
4226-
SDVTList VTs = DAG.getVTList(VT0, VT1);
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SDValue Sum = DAG.getNode(Opcode, DL, DAG.getVTList(VT0, FlagsVT), OpLHS,
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OpRHS, OpCarryIn);
@@ -4232,7 +4231,7 @@ static SDValue lowerADDSUBO_CARRY(SDValue Op, SelectionDAG &DAG,
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IsSigned ? overflowFlagToValue(Sum.getValue(1), VT1, DAG)
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: carryFlagToValue(Sum.getValue(1), VT1, DAG, InvertCarry);
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4235-
return DAG.getNode(ISD::MERGE_VALUES, DL, VTs, Sum, OutFlag);
4234+
return DAG.getMergeValues({Sum, OutFlag}, DL);
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}
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static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
@@ -4257,8 +4256,7 @@ static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
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Overflow =
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DAG.getNode(AArch64ISD::CSEL, DL, MVT::i32, FVal, TVal, CCVal, Overflow);
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4260-
SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32);
4261-
return DAG.getNode(ISD::MERGE_VALUES, DL, VTs, Value, Overflow);
4259+
return DAG.getMergeValues({Value, Overflow}, DL);
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}
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// Prefetch operands are:

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